Job Description

Developing innovative technology solutions and bringing them to application - that is our goal at the Fraunhofer Institute for Photonic Microsystems IPMS With our expertise in the development of photonic microsystems, related technologies including nanoelectronics and wireless communication solutions, we create - in flexible and interdisciplinary teams - technologies for innovative products in a wide range of markets such as automotive, industrial and aerospace.

High-level synthesis (HLS) is a design process that automatically converts algorithms written in high-level programming languages, such as C or C++, into hardware description languages like Verilog or VHDL. This enables designers to create digital hardware (e.g., ASICs or FPGAs) more efficiently, by working at a higher abstraction level and letting the HLS tool handle the detailed hardware implementation. HLS helps accelerate development, improve productivity, and simplify hardware optimization. The main focus of the task is to develop, verify, and prepare the application of HLS synthesis in a way that is usable for the working group.

The objective of this assignment is to implement the ASCON authenticated encryption algorithm in hardware using high-level synthesis (HLS).
ASCON is a lightweight, authenticated encryption algorithm designed for resource-constrained environments such as IoT devices and embedded systems. It provides both confidentiality and integrity, and was selected as a finalist in the CAESAR competition for authenticated encryption. ASCON is known for its simple structure, efficient performance, and strong security properties. In the future, ASCON may be included alongside AES in the MACsec specification to offer an alternative lightweight encryption option.

Be part of change

• High-Level Synthesis fundamentals exploration You study the principles of high-level synthesis and compare relevant HLS tools, such as Xilinx Vitis HLS and Mentor Catapult HLS. You focus on the Free SystemC Compiler (ICSC) for compiling SystemC into SystemVerilog and identify best practices for writing HLS-compatible C/C++ code.
• ASCON literature review and analysis You research the ASCON algorithm to understand its structure, functions (e.g., permutation, S-boxes, key and tag length), and security features. You summarize the findings from official specifications, academic papers, and implementation examples.
• ASCON implementation in C/C++ You implement the core functions of the ASCON algorithm in C or C++, referencing existing examples to validate your approach. You ensure your design avoids dynamic memory allocation and complex libraries, making it compatible with HLS tools.
• High-Level Synthesis translation You use an HLS tool to synthesize your C/C++ implementation into hardware description languages like Verilog or VHDL. You analyze synthesis results, focusing on resource usage, timing, and throughput.
• Documentation and reporting You document your work, including literature review summaries, implementation strategies, references to online examples, challenges encountered, synthesis results, and optimization suggestions.
  
  

The tasks can also be implemented as part of an internship or as a topic for a bachelor or diploma thesis

What you contribute

• Academic Background: You are currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. A solid understanding of digital logic design and hardware description languages (Verilog/VHDL) is essential.
• Technical Skills: You have experience with C/C++ programming and basic knowledge of cryptographic algorithms, including their implementation. Familiarity with the basics of high-level synthesis and digital hardware design flow is highly desirable.
• Problem-Solving: You demonstrate resilience and a structured approach to debugging and resolving issues in programming and hardware design. Patience and perseverance to test multiple solutions and design iterations are critical qualities.
• Creativity and Flexibility: You actively contribute innovative ideas based on your expertise and promote them for further development. You balance creativity with flexibility, following conventional approaches when required.
• Fast Learning Ability: You are eager to learn and capable of quickly grasping new concepts and technologies, adapting them effectively to your work.
• Communication Skills: You possess strong communication abilities and listen attentively to feedback and suggestions from supervisors. You respond thoughtfully and constructively to drive project success.
• Language Skills: You have good German and English language skills to support effective collaboration.

What we offer

We offer you an exciting task and valuable insights into the methods and procedures of a modern high-tech research institute. A motivated and dynamic team awaits you in a very well-equipped research and development environment. In addition, we offer you connecting points in the context of your studies or your career entry, e.g. a topic for your thesis or the beginning of your career at Fraunhofer IPMS. We will support you!

The weekly working time is a maximum of 20 hours and is to be coordinated flexibly. The position is initially limited for 1 year. A long-term collaboration is strived. We value and promote the diversity of our employees' skills and therefore welcome all applications – regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity. Severely disabled persons with equal qualifications will be given preference in hiring. Remuneration according to the general works agreement for employing assistant staff.

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future.

Ready for a change? Then apply now and make a difference! Once we have received your online application, you will receive an automatic confirmation of receipt. We will then get back to you as soon as possible and let you know what happens next.

Contact

Mr. Eric Graebe
Human Resources
Phone: +49 (0)351 8823 1505

Mr. Andreas Heinig
Specialty Department
Phone: +49 (0)351 8823 288

Fraunhofer Institute for Photonic Microsystems IPMS

www.ipms.fraunhofer.de

Requisition Number: 82480