Job Description

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com

Verification Lead
Austin, TX

About the team

The IoT Digital Design team is a state-of-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs is the responsibility of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class radios to support a wide range of wireless IoT applications and standards. We strive to provide best in class technology solutions through innovation in custom RISC-V Cores and AI/ML components

Verification Lead

The position involves deploying UVM/C based Testbenches for multi-core, multi-threadedprocessor basedchips with emphasis on verifying and signing off performance and power along with functionality. The candidate should have worked on architecture of chip-level testbenches and verification of SoCs and chipsets with ARM Cortex and proprietary processor technology and AMBA AHB/AXI/APB protocols along with peripheral interfaces like SDIO, UART, I2S, I2C, PWM. 

Responsibilities

• Lead a team to complete the pre-silicon verification of anSoC. 

• Develop and track execution of chip level test plan to meet product requirements and established quality standards.

• Execute andmaintainchip levelverificationregressions. Triage and debug failing tests. 

• Tests will becombinationof directed (C tests), constrained random (UVM), and formal verification. 

• Coverage closure,gradingand analysis.

• Perform gate level verification across corners. Provideappropriate activityfiles for power analysis.  

• Proventrack recordof finding deep system level bugs

• Able toexecute onstrict timelines and support multiple projects simultaneously

• Support Application and validation teams with customer issues

• Provide succinct weekly status and drive action items to closure. 

• Coordinate verification activities with a global team of verification andthe designengineers

• Advance verificationmethodologywith continuous process improvements

Experience Level:  15+ years in Industry 

Education Requirements: Bachelor orMaster’sdegree in electrical and/or Computer Engineering 

Minimum Qualifications 

• Develop and signoff on test plans and test cases. 

• Strong knowledge of digital design and AMBA AHB/AXI/APB based SoC Architecture 

• Strong knowledge of Verilog, System Verilog, UVM, C/C++ 

• Advanced verification skill in SVAs, constrained random stimulus amd coverage analysis

• Knowledge of scripting languages like Perl, Python,Tcl, shell

• Analytical debugging skills 

• Knowledge on C Based Testcases 

• Knowledge of SoC, Memory and Cache Architectures 

• Debug SDF Back Annotated Gate Simulations

Preferred Qualifications

• Knowledge of high-speed interfaces like Quad/Octa-SPI 

• Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN 

• Knowledge of wireless technologies like WLAN, Bluetooth, ZigBee 

• Experience integrating third-party VIPs

• Mixed Signal Real Number Modeling (RNM, Spice) 

• Verify and debug low-power design with UPF

• Mentoring skills 

• Exceptional problem-solving skills 

• Good written and oral communication skills

• Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making.

Benefits & Perks

You can look forward to the following benefits:

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans

• Highly competitive salary

• 401k plan with match and Roth planoption

• Equity rewards (RSUs)

• Life/AD&D and disability coverage

• Flexible spending accounts

• Adoptionassistance

• Back-Up childcare

• Additionalbenefit options (Commuter benefits, Legal benefits, Pet insurance)

• Flexible PTO schedule

• 3 paid volunteer days per year

• Charitable contribution match

• Tuition reimbursement

• Free downtown parking

• Onsite gym

• Monthly wellness offerings

• Free snacks

• Monthly company updates with our CEO

The annualized base pay range for this role is expected to be between $150,500 - $279,500 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.