We’re seeking a Verification Engineer to contribute to the validation of advanced chip designs. You’ll help create and maintain UVM environments, write tests, and ensure functional coverage for high-performance silicon products. The role involves close collaboration across architecture, design, and circuit teams.
Responsibilities
Qualifications
Preferred / Plus
FortifyIQ engineers certifiable cryptographic IP cores, software libraries, and roots of trust combining traditional algorithms (AES, RSA, ECC, HMAC-SHA2) with post-quantum cryptography (PQC). All hardware IP cores implement RTL-level algorithmic SCA/FIA countermeasures, while software libraries use the same algorithmic protections, delivering high-assurance security with minimal impact on performance, power, or area.
Our solutions are foundry- and platform-agnostic, integrating securely across a wide range of devices, from smart cards and IoT nodes to AI accelerators and cloud systems. FortifyIQ validates all designs using proprietary pre- and post-silicon EDA tools, supported by formal proofs, extensive research, and a growing portfolio of patents.
FortifyIQ cryptography provides secure boot and post-quantum readiness, with software OTA-updates and asymmetric hardware IP (ECC, RSA, PQC) FOTA-updates, supporting high-assurance embedded, industrial, and cloud systems. By combining rigorous physical attack resilience with near-native efficiency in both hardware and software, FortifyIQ delivers advanced cryptography that is certifiable, reliable, and built to meet the challenges of high-assurance, real-world applications.
