Job Description

Member of Technical Staff — Design & Verification Training

Location: Remote (U.S.), with some travel — candidate must be located near a major U.S. airport

Terms: Full-time, direct hire

Compensation: Dependent on experience level, flexible for the right candidate, plus company-paid medical, dental, and vision

Position Purpose

Our client is the leading independent training company serving the semiconductor design and verification marketplace, with its North American headquarters in San Jose. Our client has grown substantially over the past number of years and is poised for significant additional growth throughout North America.

This is an exceptional opportunity for an experienced ASIC/FPGA design & verification technical leader to join a fast-paced, team-oriented environment where you can make a positive impact on the business. Your upbeat, energetic attitude and ability to develop training curriculum, then effectively engage an audience and present complex engineering topics in a clear, easily absorbed way, will be key to your success in this exciting role.

This is no ordinary engineering role, but rather an opportunity to raise your visibility in the design and verification community and develop “guru” status among your peers as your reputation continues to grow by helping others gain knowledge of complex topics such as VHDL, Verilog, SystemVerilog, UVM, SystemC, TLM, Formal and other emerging design and verification languages and application methodologies through instructor-led classroom and virtual training venues.

Essential Functions & Responsibilities

• Design and develop training courseware for new service offerings, keeping content current with emerging design/verification languages and methodologies.
• Deliver product and service training via classroom, virtual, and webinar formats, including training customized to specific client requirements.
• Maintain all developed courseware and tutorial scripts as tools and methodologies evolve.
• Travel to customer sites (no more than 25%), mostly within North America but occasionally worldwide.
• Sustain expertise at the leading edge of hardware/systems design and verification languages, tools, and methods.
• Support pre-sales and technical marketing activities, including impressing customers in training and technical presentation situations.

Knowledge, Skills & Abilities

Technical Skill Set

• Expert-level ASIC/FPGA design and verification — using SystemVerilog and UVM (required for all candidates).
• VHDL and/or Formal verification — expert-level knowledge is ideal, in addition to SystemVerilog and UVM.
• EDA tool experience — hands-on use of tools from Cadence, Siemens EDA, and/or Synopsys.
• Classroom training or Verification Consulting experience — prior experience providing classroom instruction and/or digital design or verification consulting services is ideal.
• SystemC / TLM familiarity — exposure to Transaction-Level Modeling and other emerging design/verification languages is a plus.

Non-Technical Skill Set

• Enjoys teaching and mentoring others — whether that's formal classroom instruction or simply being the person teammates go to when something needs to be explained well. Formal training experience is a plus, not a requirement.
• Excellent communication skills — a clear, articulate communicator who expresses confidence and is adept and enthusiastic about elevating students' knowledge.
• Strong presentation skills — professional written, verbal, and presentation communication with the ability to interact with internal and external clients at all staff levels.
• Comfortable in pre-sales settings — capable of impressing customers in pre-sales, training, and technical presentation situations.
• Travel-ready — willing and able to travel an estimated 25% of the time.

Position Minimum Requirements

• Expert-level knowledge and experience in ASIC/FPGA design and verification using SystemVerilog and UVM.
• Bachelor of Science degree in Electrical Engineering or Computer Science (MS preferred).
• Located near a major U.S. airport, with willingness to travel approximately 25%.