Experience: 5+ years
Experience with Vectorless Low Power (VCLP/CLP) tools is a must
Enable and execute UPF-based low-power verification at block and full-chip levels
Validate power intent correctness including isolation, retention, level shifters, power switches, and always-on logic
Debug and resolve low-power violations related to missing/incorrect UPF definitions and design connectivity
Create reference low-power flows and testcases to evaluate tools, PDKs, and EM/LP-related collateral
Develop and automate VCLP workflows to enhance accuracy and reduce runtime of VCLP signoff. Automation using Python/Perl/Tcl is preferred
Collaborate with RTL, PD, and Power Architecture teams to close low-power issues
Prepare low-power signoff reports and maintain VCLP checklists
Document VCLP methodologies and train users on low-power best practices
null
null
null
HCLTech is a global technology company, home to more than 226,600 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2025 totaled $14.2 billion. To learn how we can supercharge progress for you, visit hcltech.com.
