Job Description

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​

Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Nokia is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to create innovative products in a fast-paced and collaborative team environment. The engineer will be hands-on with all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test and production ramp-up. As a member of a vertically-integrated team, the engineer will be directly supporting system level customers and will be closely working with product, operations and reliability teams. The self-motivated engineer must be able to anticipate problems and devise effective solutions.

• Work closely with circuit designers to optimize the floor plan;

• Perform daily layout editing, DRC/LVS tasks to ensure the quality of the layout;

• Employ efficient design methodologies to reduce the number of iterations and promptly deliver the product.

Mandatory Knowledge/Skills/Abilities:

• Extremely familiar with layout editing tools, such as Virtuoso and Laker;
• Highly proficient with DRC/LVS/ERC related tools and flows, such as Calibre, PVS (or IC Validator);
• Decent understanding in the issues of electro-migration and IR drop, RC delay, self-heating, capacitive cross-talk, etc.;
• Decent understanding in analog layout requirements, such as matching and shielding;
• Has extensive experience in the layout of low-power, high-resolution circuits, such as SD-ADC, SAR-ADC, bandgap, and regulators.

• Knowledge in automatic P&R or chip-level floor planning/integration.

  Preferred Knowledge/Skill/Abilities:

• Decent Understanding of analog design methodologies, including the use of layout constraints;
• Knowledge in performing RC extraction and EM/IR analysis;
• Excellent communication skills and team spirit to work with members across multiple sites and functionalities;

• Experience in designing layouts for high-resolution, high-performance analog / mixed-signal circuits.

  Education and Experience Requirements:

• BS degree or Associated degree.
• Have more than 10 years’ experience in analog/mixed signal layout design.

NION2026