Job Description

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
• 10 years of experience in analog/mixed-signal design.

Preferred qualifications:

• Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field.
• Experience leading a block or sub-system tape-out for high-speed Inputs/Outputs.
• Experience with noise analysis/jitter decomposition/adaptive loops.
• Experience with package and printed circuit board (PCB) co-design and their impact on signal integrity.
• Experience in system-level modeling and simulation using tools like Matlab or Python.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Staff Analog Design Engineer, you will design and integrate analog sub-systems. You will be responsible for ensuring the analog front-end (AFE) communicates with the digital signal processor (DSP), the package and silicon are a single electrical entity. Your work will bridge the analog and digital worlds to enable industry-leading performance.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Responsibilities

• Own the architecture and implementation of a major sub-component, such as the entire receiver AFE or the clocking/phase-locked loop (PLL) distribution network.
• Design the critical suspension system (e.g., equalization/continuous-time linear equalizer (CTLE), analog-to-digital converter (ADC) that allows the digital core to function perfectly despite a noisy, high-loss channel.
• Lead the definition and design of test chips to prove out novel topologies and circuit techniques in next-generation gate-all-around (GAA) nodes.
• Work with DSP, firmware, and system architects to define hardware/software partitioning and interface specifications.
• Provide technical guidance and mentorship to engineers on the team.