Job Description

General Information

Job Title
STA and Timing Characterization Specialist
Job ID
16883
Country
India
City
Bengaluru
Date Posted
07-Apr-2026
Job Category
Engineering
Job Subcategory
Analog Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and highly skilled engineer who thrives in a collaborative, fast-paced environment. With a deep understanding of analog design principles, you have honed your expertise in static timing analysis (STA) and timing characterization over 4-8 years in the semiconductor industry. You are driven by curiosity and a desire to solve complex challenges, always seeking innovative solutions to enhance performance and reliability. Your experience allows you to confidently debug circuit-level issues, leveraging your proficiency in transistor-level design simulation. You are comfortable working with advanced tools like SiliconSmart and NanoTime, and your strong scripting skills enable you to automate tasks and streamline processes efficiently. You believe in fostering a culture of accountability and ownership, leading by example and inspiring your teammates to deliver their best. Your communication skills—both written and verbal—are a key asset, enabling you to build strong relationships with internal development teams and contribute meaningfully to cross-functional projects. You hold a BTech or MTech in Electronics or Electrical Engineering, and you are committed to continuous learning and professional growth. Your adaptability, attention to detail, and problem-solving mindset make you an invaluable member of any engineering team, and you are eager to play a pivotal role in advancing Synopsys’ technology leadership.

What You’ll Be Doing:

• Driving DDR, HBM, and UCIE timing generation and validation in partnership with circuit design and layout teams.
• Performing static timing analysis (STA) and timing characterization, ensuring robust timing constraints and accurate correlation with design requirements.
• Debugging and resolving timing violations at both circuit and system levels, applying deep transistor-level simulation expertise.
• Utilizing SiliconSmart, NanoTime, and advanced scripting to automate timing analysis workflows and improve efficiency.
• Collaborating closely with internal development teams to communicate findings, propose solutions, and implement best practices.
• Providing technical leadership, mentoring junior engineers, and championing quality and accountability throughout project lifecycles.

The Impact You Will Have:

• Enabling Synopsys to deliver high-performance, reliable IP solutions for industry-leading clients in semiconductor technology.
• Ensuring the integrity and robustness of timing generation across critical product lines such as DDR, HBM, and UCIE.
• Accelerating design cycles through automation and advanced analysis, supporting Synopsys’ reputation for efficiency and innovation.
• Reducing risk and improving silicon success rates by identifying and resolving complex timing issues early in the design process.
• Enhancing collaboration across engineering functions, contributing to a culture of excellence and shared technical leadership.
• Driving the adoption of new methodologies and tools that push the boundaries of analog design and verification.

What You’ll Need:

• BTech/MTech degree in Electronics or Electrical Engineering.
• 4-8 years of hands-on experience in STA, timing characterization, and analog design.
• Strong proficiency in transistor-level design simulation and debugging circuit-level issues.
• Experience with SiliconSmart, NanoTime, and advanced scripting (Python, Perl, TCL, etc.).
• Solid understanding of timing constraints, violation debugging, and timing correlation with design.

Who You Are:

• Analytical thinker with a keen eye for detail and accuracy.
• Effective communicator, both written and verbal, able to collaborate with diverse teams.
• Proactive problem solver, adaptable to evolving project needs.
• Technical leader who inspires accountability and ownership in others.
• Continuous learner, eager to stay ahead of industry trends and best practices.

The Team You’ll Be A Part Of:

You will join a world-class engineering team in Bangalore, focused on analog design, timing analysis, and IP development for cutting-edge semiconductor solutions. The team collaborates across domains to deliver best-in-class performance, working closely with circuit, layout, and verification experts. Together, you will drive innovation and technical excellence, contributing to Synopsys’ global leadership in chip design and integration.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.