We are building an intelligent analog design automation flow that applies agentic AI and machine learning to modernize legacy design and verification practices. You will join a central engineering team developing a next-generation, AI-enabled design and verification platform for some of the most complex analog/mixed-signal and RF products and modules in the industry—from die-level blocks to integrated module architectures.

This role calls for an engineer who brings RF/analog design depth across internal and foundry process nodes, and the automation mindset to encode that expertise into scalable flows. Your block-level design knowledge and hands-on flow development will inform how the platform reasons about circuits, runs verification, and guides engineers through complex AMS and RF workflows. You will help bridge proven design practice and new automation capabilities so the platform is grounded in how high-performance RF products are actually built and signed off.

Responsibilities

• Understand design, simulate, and layout challenges in RF/analog blocks including PAs, LNAs, switches, and filter networks in Cadence Virtuoso across multiple process technologies and be able to encode that knowledge into an intelligent automation flow
• Understand how design, simulation and physical verification data is generated across distributed platforms and develop strategies for engineering that data for a machine learning and/or agentic AI platform
• Partner with PDK, layout, and verification teams to align design practices with process capabilities, DRM limits, and foundry release schedules
• Develop connections between design steps and tools in the analog, RF and mixed-signal domains using agentic AI framework with the goal of developing a self-evolving design flow

Required Experience and Skills

• M.Tech/M.E./M.S. in Electrical/Electronics Engineering, Computer Engineering, or Computer Science from a reputed institution
• 3–5 years of professional experience spanning software/AI for engineering workflows and hands-on analog or RF design exposure
• Working knowledge of agentic AI systems: multi-step agents, tool use / function calling, planning and orchestration, and evaluation of agent behavior in production or prototype settings
• Practical ML/AI skills: Python-based development with frameworks such as PyTorch, TensorFlow, or LangChain/LlamaIndex (or equivalent); experience building LLM applications, RAG pipelines, or ML inference services
• Preliminary but hands-on analog/RF design experience in Cadence Virtuoso—schematic entry, simulation, and basic layout/verification for blocks such as PA, LNA, switches, or filters (need not be deep specialist ownership of every block type)
• Familiarity with RF fundamentals sufficient to collaborate with design experts: S-parameters, matching, noise figure, linearity, and layout-sensitive parasitics
• Proven Cadence automation experience using SKILL and Python for flow orchestration, testbench setup, results parsing, or layout-assisted routines
• Exposure to both internal/custom process technologies and external foundry PDKs for analog/RF work
• Ability to translate design/verification practices into structured workflows, prompts, tools, and evaluation criteria for AI agents

Desired Experience and Skills

• Experience building or integrating agentic workflows that call EDA tools (simulation, DRC/LVS, EM, or job schedulers) as tools in a loop
• Familiarity with chain-of-thought / structured reasoning patterns, agent memory, guardrails, and human-in-the-loop review for engineering decisions
• MLOps or model-serving experience (MLflow, FastAPI, ONNX, vector DBs) applied to engineering or EDA data
• Experience with filter co-design in a module environment, EM-aware layout, or AMS co-simulation—useful as domain grounding for agent behavior
• Scripts that integrate with HPC/job farms for batch simulation or regression used by automated agents
• Silicon correlation or lab measurement exposure that informs how agents interpret “pass/fail” vs. measured reality
• Interest in applying ML to circuit/layout representations (graphs, embeddings) beyond text-only LLM use

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