Job Description
This role is for one of the Weekday's clients
Min Experience: 3+ years
Location: Bengaluru, Karnataka, India
JobType: full-time
We are looking for a skilled SoC Verification Engineer to join our semiconductor design and verification team. In this role, you will be responsible for validating complex ARM-based System-on-Chip (SoC) designs through comprehensive verification methodologies. You will work closely with design, architecture, and validation teams to ensure functional correctness, performance, and quality of next-generation SoC products.
The ideal candidate should have strong expertise in SoC Design Verification, SystemVerilog (SV), UVM, and gate-level verification, along with experience in developing scalable verification environments and achieving coverage closure.
Requirements
Key Responsibilities
- Develop, execute, and maintain comprehensive verification plans for SoC-level functionality.
- Design and implement test cases for complex SoC verification scenarios covering functional, integration, and system-level features.
- Build and enhance reusable SystemVerilog/UVM-based verification environments for efficient validation.
- Execute gate-level simulations (GLS) to validate design functionality, timing behavior, and identify implementation-related issues.
- Debug failures observed during gate-level and low-power simulations, perform root cause analysis, and collaborate with design teams for resolution.
- Drive functional and code coverage closure by developing targeted test scenarios and improving verification completeness.
- Verify ARM-based SoC subsystems, peripherals, and interconnects across multiple integration levels.
- Analyze simulation results, identify corner-case issues, and ensure high-quality verification sign-off.
- Collaborate with RTL designers, architects, physical design engineers, and firmware teams throughout the development lifecycle.
- Validate low-power design features including power domains, retention, isolation, and power sequencing.
- Participate in verification reviews, debugging sessions, and quality improvement initiatives.
- Maintain verification documentation, test plans, regression reports, and coverage metrics.
Required Skills
- Strong experience in SoC Design Verification
- Hands-on expertise in SystemVerilog (SV) and UVM testbench development.
- Good programming knowledge in C
- Experience developing reusable verification components, sequences, scoreboards, monitors, and assertions.
- Strong understanding of ARM-based SoC architecture and system-level verification scenarios.
- Experience executing and debugging Gate Level Simulations (GLS)
- Experience working with Low Power Verification methodologies.
- Good understanding of coverage-driven verification, functional coverage, and coverage closure techniques.
- Familiarity with industry-standard simulation and debugging tools.
- Strong debugging, analytical, and problem-solving abilities.
Must-Have Skills
- SoC Verification Engineer
- Design Verification
- UVM
- SystemVerilog (SV)
- Gate Level Simulation (GLS)
- Coverage Closure
- ARM-based SoC Verification
- C Programming
Good-to-Have Skills
- Knowledge of AMBA Bus Protocols including:
- Low Power Verification (UPF/CPF concepts)
- Assertions (SVA)
- Regression automation and scripting using Python, Perl, or Shell
- Experience with emulation or FPGA prototyping is an advantage.
Qualifications
- Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, VLSI, or a related discipline.
- 3–10 years of experience in SoC Design Verification within semiconductor or ASIC development environments.
- Proven experience in UVM-based verification methodology and complex SoC validation.
