Job Description

• Central Engineering Group is pioneering innovation with unique Custom ASIC Design Division offering end-to-end customizable silicon solutions for our customers in the client, server, AI and Automotive space.
• Joining as an SoC Logic Design Engineer, you will play a critical role in crafting the building blocks of cutting-edge technology, enabling our customers to bring their innovative designs to life.
• This position is part of the Customer Solutions Engineering (CSE) group, where your contributions will directly impact Intel's customers by integrating the best of Intel technologies into their solutions.
• Be part of a team that bridges architecture to post-silicon validation, driving excellence in silicon design and ensuring secure, resilient, and sustainable systems.

Key Responsibilities:
- Develop logic design, register transfer level (RTL) coding, and simulation for SoC designs, creating cell libraries and functional units for inclusion in full chip designs.
- Integrate logic of IP blocks and subsystems into SoC designs while ensuring power, performance, area, and timing goals are met.
- Participate in the definition of architecture and microarchitecture features for logic components.
- Perform quality checks on RTL and apply strategies to optimize logic for physical implementation.
- Execute secure development practices to address security threats and achieve design integrity.
- Collaborate with IP providers to integrate and validate IPs at the SoC level.
- Review verification plans and resolve failing RTL tests to ensure correctness in design features.
- Provide IP integration support to customers and represent the RTL team, acting as a technical liaison for SoC solutions.
- Responsible for the quality of the Integrated RTL and delivering the FE bundle to the backend team.

Qualifications:

- Bachelor's degree in Electrical Engineering, Computer Science or other related field with 5+ years of experience in RTL design and Integration.
- Master's degree in Electrical Engineering, Computer Science or other related field with 3+ years of experience in RTL design and Integration.
- Proficiency in RTL design, logic development, and SoC integration.
- Demonstrated experience in low-power design and clock domain crossing.
- Familiarity with Front End SoC quality/efficiency guardrails.
- Expertise in low-power design architecture, verification, and optimization techniques.
- Working knowledge in Soft Radio SOCs is added plus (5G/6G Radio Solutions)
- Familiarity with adjacent areas of SoC development, such as synthesis, static timing analysis, and formal equivalence checking.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.