Job Description

Our vision is to transform how the world uses information to enrich life for all

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using theirexpertisein the relentless pursuit of innovation for customers and partners. The solutions we build enable everything from AI acceleration andhigh‑performancecomputing tonext‑generationmemory systems. We do it all while committing to integrity, sustainability, and giving back to our communities—fueling the innovation we pursue.

As a Low Power Architect, you will be a key technical leader within the Heterogeneous Integration Group (HIG), responsible for defining, modeling, and drivingSoC‑levelpower architecture fornext‑generationHBM logic die andmemory‑centricSoCs. You will work across architecture, RTL, verification, physical design, firmware, and product teams to deliverindustry‑leadingperformance‑per‑wattsolutions under aggressive power, thermal, and reliability constraints.

This role combinessystem‑levelarchitectural ownership with deep collaboration through implementation and siliconbring‑up

Key Responsibilities

• Define and ownSoC‑levellow‑powerarchitecture, including power domains, voltage islands, clocking strategies, andlow‑poweroperating modes (active, idle, retention, sleep).

• Develop power, performance, and thermal models to evaluate architectural tradeoffs and guide PPA optimization across workloads and use cases.

• Architect and drive implementation of power management features such as DVFS, clock gating, power gating, retention strategies, and adaptive performance controls.

• Collaborate with SoC and subsystem architects to translate product requirements intopower‑awaremicro‑architecturalspecifications.

• Partner closely with RTL, verification, and physical design teams to ensure correct and efficient implementation of power intent (e.g., UPF/CPF), including debug ofpower‑relatedfunctional and timing issues.

• Work with firmware and software teams to definehardware‑softwarepower management interfaces, sequencing, and control flows.

• Drive performance vs. power analysis to support product decisions, roadmap planning, and customer requirements.

• Supportpre‑siliconvalidation andpost‑siliconbring‑up, including silicon power characterization, correlation to models, androot‑causeanalysis.

• Contribute to architectural documentation, design reviews, andcross‑functionaltechnical discussions.

• Mentor junior architects and engineers, promoting best practices inlow‑powerdesign.

Qualifications

• Strong experience in SoC orsystem‑levelarchitecture with a focus onlow‑powerorenergy‑efficientdesign.

• Deep understanding of power management techniques: DVFS, power gating, clock gating, voltage regulation, andlow‑powerstate machines.

• Experience with power modeling, analysis, andtrade‑offstudies at system and block level.

• Familiarity with hardware/software interactionsimpactingpower efficiency.

• Working knowledge of RTL design concepts andlow‑powerimplementation flows (SystemVerilog, UPF/CPF).

• Experience across theRTL‑to‑GDSflow, including synthesis, STA, and powersign‑offconsiderations.

• Strongcross‑functionalcommunication and technical leadership skills.

• Programming or scripting experience (e.g., Python, C/C++, TCL).

• Ability to work effectively in a global engineering environment.

Preferred Qualifications

• Experience with HBM, DRAM, ormemory‑centricSoCs.

• Background in GPU, CPU, orhigh‑performanceaccelerator architectures with aggressive power targets.

• Familiarity with industry power standards and frameworks (e.g., ARM power management concepts,SCMI‑likeinterfaces).

• Exposure to silicon power measurement, lab characterization, orpost‑silicondebug.

• Experience with emulation or prototyping platforms.

• Master’s or PhD in Electrical Engineering, Computer Engineering, or related field.

• 10+ years of relevant industry experience, withdemonstratedarchitectural ownership and mentorship.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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To learn more about Micron, please visit micron.com/careers

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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