Your Job
Molex is seeking a Siphotonics PIC Layout Engineer responsible for translating photonic circuit designs into manufacturable layouts using industry-standard EDA tools. The role involves working closely with device designers, process engineers, and foundry partners to ensure correct functionality, performance, and design rule compliance.

Our Team
Molex creates connections for life by enabling technologies that transform the future and improve lives. With presence in more than 40 countries, Molex offers a complete range of connectivity products, services and solutions for the data communications, medical, industrial, automotive and consumer electronics industries.
Our Datacom and Specialty Solutions (DSS) team designs an extensive product line serving customers in telecommunications, datacom, hyperscalers, cloud, data center and storage applications. The widespread growth of high speed and broadband systems introduces unique signal integrity issues. Our team is providing RF solutions with good signal integrity which is critical for high-speed transmission inter & intra data center.

What You Will Do
1. PIC Layout Development

• Create and optimize layout for silicon photonic components (waveguides, MZMs, couplers, resonators, gratings, photodiodes, etc.).
• Build hierarchical photonic layouts for full PICs and subsystems based on schematic drawing and optical& electrical I/O requirements.
• Implement compact models, PCells, and parameterized photonic building blocks.

2. Design Rule Compliance

• Ensure all layout designs meet foundry technology design rules (DRC).
• Perform advanced rule checks for optical constraints (bend radius, spacing, transition loss minimization).

3. Layout Verification

• Run LVS for photonic circuits (e.g., Mentor Calibre, Synopsys IC Validator)– Validate connectivity and device recognition.
• Conduct physical verification (DRC, XOR, density checks).
• Debug and resolve LVS/DRC violations with designers.

4. Collaboration & Integration

• Work with PIC integration design engineers to implement mask changes and tuning structures.
• Collaborate with PIC component design engineer to develop and maintain PDK and components (PCell libraries, design checks, DFM decks).
• Support tape-out preparation (GDS merging, layer mapping, OPC files).

5. Automation & Tools

• Develop layout automation scripts in Python, SKILL, Tcl, or KLayout Python API.
• Contribute to design flow improvement and tool interoperability.

Who You Are (Basic Qualifications)

• Bachelor’s or Master’s in EE, Physics, Photonics, or related field.
• Experience with photonic layout/EDA tools such as:
• Cadence Virtuoso
• Klayout
• Silvaco Expert
• Luceda IPKISS
• Synopsys OptoDesigner
• SiEPIC tools
• Familiarity with foundry PDKs and photonic manufacturing processes.
• Strong understanding of optical waveguide behavior, bending, coupling, and loss mechanisms.
• Experience with Calibre/ICV for DRC/LVS..

What Will Put You Ahead

• Experience with silicon photonics platforms (e.g., IME, AMF, GF, Intel, Tower, Ligentec).
• Background in PIC test structures and layout for wafer-level testing.
• Knowledge of electronic-photonic co-design (EIC/PIC integration).
• Experience with mask preparation, GDS manipulation, and OPC requirements.
• Familiarity with Python-based design tools (Nazca, SiEPIC KLayout)
• Soft skills including but not limited to below,
• Strong communication and cross-team collaboration.
• Detail-oriented and capable of managing multiple tape-outs.
• Problem-solving attitude for debugging complex physical designs

At Koch, employees are empowered to do what they do best to make life better. Learn how our business philosophy helps employees unleash their potential while creating value for themselves and the company.

Additionally, everyone has individual work and personal needs. We seek to enable the best work environment that helps you and the business work together to produce superior results.

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