Minimum qualifications:

• PhD degree in Electrical Engineering, Computer Engineering, Physics, Materials Engineering, or Computer Science.
• Relevant practical or internship experience, or personal project experience in hardware or electrical engineering.

Preferred qualifications:

• Working knowledge of physical layer requirements for PCIe, Ethernet (IEEE 802.3).
• Advanced proficiency in Python (NumPy, Pandas) for data analysis and instrument control.
• Ability to correlate lab measurements with pre-silicon SI simulations (HSPICE, ADS, or Sigrity).

About the job

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

• Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
• Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
• Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
• Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
• Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.