Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience.
  
• 4 years of experience in SoC architecture, power/performance modeling, or pre-silicon verification.
• Experience with low-power design methodologies or power management techniques (e.g., power gating, DVFS, low-power states).
• Experience with memory subsystems, interconnects, or data paths to DDR.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field (e.g., Optics, Sensors, Audio/DSP).
  
• Experience specifically analyzing or architecting mobile/wearable SoCs for AR, VR, or computer vision applications.
  
• Experience with architectural simulators or power estimation tools (e.g., Synopsys PrimePower, ANSYS PowerArtist, or proprietary modeling frameworks).
• Practical knowledge of low-power islands (LPI) or always-on subsystem architectures.
• Excellent communication skills to translate complex architectural trade-offs into clear product decisions for leadership.

About the job

Responsibilities

• Benchmark and model next-generation AR/VR use cases against industry competitors to identify architectural gaps and opportunities.
• Analyze end-to-end workloads (spatial mapping, hand tracking, passthrough video) to quantify their impact on total Pixel power consumption.
• Leverage low-power design techniques, specifically optimizing the utilization of low-power islands (LPIs) to keep ambient AR/VR tasks highly efficient.
• Map and optimize critical data paths from the display/sensors through the SoC fabric and the path to DDR, ensuring maximum bandwidth with minimal power overhead.
• Partner with software, product, and hardware teams to translate architectural insights into actionable silicon requirements for future Pixel SoCs.