We are seeking an experienced SystemC Engineer to join our ASIC development team. The ideal candidate will have a strong background in SystemC modeling, digital signal processing (DSP), and ASIC development flows. This role involves developing high-level SystemC models, translating DSP algorithms into efficient SystemC implementations, and working closely with architecture, System, RTL, verification, and algorithm teams to enable system-level modeling and verification.
Responsibilities
* Develop and maintain high-performance SystemC models for complex optical systems and ASIC designs.
* Translate DSP algorithms from MATLAB into accurate and efficient SystemC implementations.
* Translate optical systems modeling into SystemC models
* Collaborate with architecture, RTL, and verification teams throughout the ASIC development lifecycle.
* Develop executable reference models for architecture exploration and functional validation.
* Support verification environments by integrating SystemC models into mixed-language simulation environments.
* Analyze and optimize model performance while ensuring functional accuracy.
* Debug and resolve functional issues across system-level.
* Participate in architecture definition, design reviews, and technical discussions.
Required Qualifications
* Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
* Minimum 5 years of experience in SystemC development.
* Strong proficiency in SystemC, C++, and Transaction-Level Modeling (TLM).
* Experience with ASIC design and verification environments.
* Experience translating DSP algorithms from MATLAB to SystemC.
* Knowledge of digital signal processing concepts and fixed-point arithmetic.
* Hands-on experience with communication interfaces, including:
* Ethernet
* DSP-based communication systems
* Optical links/high-speed serial interfaces
* Strong debugging, analytical, and problem-solving skills.
* Excellent communication skills and ability to work in cross-functional engineering teams.
Preferred Qualifications
* Experience with UVM and SystemVerilog verification environments.
* Familiarity with RTL design (Verilog/SystemVerilog/VHDL).
* Experience with high-speed networking or communication ASICs.
* Knowledge of scripting languages such as Python or Perl.
* Experience with performance modeling and architectural exploration.
* Familiarity with version control systems (Git) and continuous integration workflows.
Desired Skills
* Strong system-level thinking and architectural understanding.
* Ability to work independently while collaborating across multidisciplinary teams.
* Attention to detail with a focus on model accuracy and maintainability.
* Passion for solving complex technical challenges in ASIC and communication system development.
AI is transforming industries at an unprecedented scale - but today’s data center infrastructure wasn’t built to keep up. As AI workloads grow more complex and data volumes double every two years, connectivity - not compute - has become the bottleneck.
Retym is solving this challenge by delivering next-generation Coherent DSP solutions that provide high-performance, low-latency connectivity for AI infrastructure and data center interconnects.
We are a semiconductor company driven by innovation, bringing together a world-class team of chip designers, optical networking experts, and leading investors to rethink how data moves in the AI era. Our purpose-built DSP technology delivers:
Scalable, high-bandwidth interconnects for AI-driven data centers
Power-efficient, high-performance networking that removes bottlenecks
A coherent DSP provider that gives module makers more control and builds toward a more open, vibrant ecosystem
With hyperscalers deploying AI across multiple locations and AI infrastructure requirements rapidly evolving, Retym is building the connectivity backbone for the future of AI.
The future of AI isn’t just about compute - it’s about how we move data.
Together, we are building a novel semiconductor technology that will transform the datacenter and telecommunications industries.
