Senior Engineer (Level 1) - DFT
• Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP tests and Pattern Validation w/wo Timing, DFT mode timing Analysis and sign off. • Be responsible for a comprehensive DFT plan and drive the implementation • Work with DFT and cross functional teams
IN-KA-Bangalore, India (eInfochips)
Full time
Engineering Services
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