We are seeking a highly experienced Senior VLSI Analog Design Engineer to design and deliver high-performance analog and mixed-signal IPs for advanced semiconductor solutions. The candidate will be responsible for end-to-end design ownership, from architecture to silicon validation, and will contribute to complex SoC/ASIC development programs.
Design and develop high-performance analog and mixed-signal circuits such as:
Amplifiers (OTA, Op-Amps)
Bandgap references & bias circuits
PLL/DLL, oscillators
LDOs, DC-DC converters (Buck/Boost)
ADC/DAC, comparators
Ensure robustness across PVT corners and process technologies (e.g., 180nm → FinFET nodes) _Analog_design& MSV2. Circuit Simulation & Verification
2.Perform detailed simulations:
DC, AC, transient, noise, stability
Monte Carlo, corner analysis
Reliability checks (aging, EM/IR, EOS, burn-in)
Validate design targets such as:
PSRR, SNR, ENOB, SFDR, phase noise
Work closely with layout teams on:
Floorplanning, matching, shielding, parasitic optimization
Perform:
LVS/DRC verification
Post-layout extraction (PEX) and sign-off simulations
Identify and resolve performance issues:
Stability, noise, timing, distortion
Delay, duty cycle, slew rate improvementsSreeharsha_Analog_design& MSV
Iterate designs to meet PPA (Power, Performance, Area) targetsSenior Analog design Engineer
Technical Skill Set
EDA Tools
Cadence (Virtuoso, Spectre)
Synopsys (HSPICE / PrimeSim)Senior Analog design Engineer
Simulation Expertise
DC / AC / transient / noise / stability
Monte Carlo / corner / worst-case analysis
Technology Exposure
Experience across technology nodes (e.g., 180nm to advanced nodes)
Additional Skills (Preferred)
Scripting: SKILL / Python / Perl
AMS flows and verification understanding
Exposure to SERDES / high-speed / power management domains
Desired Competencies
Strong analytical and problem-solving skills
Ability to work independently and own deliverables
Effective communication across design, layout, and verification teams
Experience in customer-facing or cross-site collaboration
Typical Projects / Domains
Power Management ICs (PMIC)
High-speed SerDes / IO
Data converters (ADC/DAC)
PLL/DLL and clocking circuits
Role Differentiation (Senior Level)
Compared to mid-level engineers, this role requires:
Ownership of complex blocks/subsystems
Significant contribution to architecture decisions
Mentoring and technical leadership responsibilities
Hands-on + review-level expertise
HCLTech is a global technology company, home to more than 226,600 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2025 totaled $14.2 billion. To learn how we can supercharge progress for you, visit hcltech.com.
