As aSrDesign Engineer, you willwork ondesign, simulation, and validation ofnext‑generationHigh‑BandwidthMemory (HBM) architectures and circuit blocks. HBMrequiresadvanced DRAM design knowledge combined with deep understanding of 3D stacked architecture, TSV signaling, wide I/O interfaces, PHY timing, power integrity, and systemco‑optimizationwith GPUs/accelerators.
This role sits at the intersection of DRAM design andhigh‑performancecomputing, enabling future AI/ML, HPC, and advanced graphics products.

In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

Responsibilities will include, but are not limited to:

• Design,optimize, andvalSupportpost‑silicon bring‑up, failure analysis, and design correlation whenrequired

• Work closely with layout engineers onfloorplanning, placement, routing, and design rule compliance

• Reviewparasitics, EM/IR, and reliability results; drive design or layout fixes as needed

• Ensure designs are manufacturable and meet foundry and packaging

• Minimum Qualifications:

• Prior experience in HBM, DRAM, high‑speed I/O, or memory‑related designs

• Familiaritywiconstraints

• Apply AI/ML-

• nabledtools that enhance productivity, design quality, verification coverage, and time-to-market

• th3D‑stacked architectures, TSVs, wide I/O interfaces, or PHY‑adjacent logic

• Understanding of DRAM array control andhigh speedcircuit design

• Experience in function verification and timing analysis with mixed signal design.

• Familiar with device reliability. Experienced in reliability mitigation technology and verification flow.

• Familiar with analog/digital simulation tools, i.e., HSPICE,VerilogHDL,Primesim’

• MS in Computer Engineering or related field

• 3yearsDRAM Design or Verification experience.

• Excellent Problem‑Solving & Analytical Skills

• idatememory, logic, analog, ormixed‑signalcircuits used in HBM products, includingPHY‑adjacentor subsystem logic

• Contribute to HBM architecture definition,block‑levelspecifications, and design tradeoff analysis across performance, power, area, and reliability

• Performpre‑layoutandpost‑layoutsimulation, modeling, and analysis to ensure robust design margins

• Supporttape‑outactivities, ECOs, and reticle experiments asrequired

• Participate in functional, timing, and power verification usingindustry‑standardsimulation tools

• Collaborate closely with Design Verification teams to review test plans, debug failures, and close coverage gaps

(LLM)