Job Description

The expected hiring range for this position is:

$124,800.00-$164,200.00.

Please note that the pay range information is a general guideline only. The pay offered to a selected candidate will be determined based on factors such the scope and responsibilities of the position, qualifications of the selected candidate, business considerations, internal equity, and external market pay for comparable jobs.

About the Role:

Fermilab is seeking a Senior ASIC Design Engineer within our Microelectronics Department. The Senior Analog ASIC Design Engineer will lead the development of custom analog and mixed-signal integrated circuits for scientific instrumentation and microelectronics operating in extreme environments, including cryogenic temperatures and radiation. The successful candidate will contribute to all phases of ASIC development—from architecture and transistor-level circuit design through layout, silicon characterization, and system integration—while collaborating with multidisciplinary teams to deliver advanced and innovative solutions for next-generation scientific applications.

What your day-to-day as a Senior ASIC Design Engineer at Fermilab will look like:

• Lead the design and development of custom analog, RF, and mixed-signal ASICs from concept through silicon validation.
• Develop system architectures, ASIC specifications, and circuit implementations based on application requirements and system-level performance objectives.
• Design high-performance analog and RF building blocks, including low-noise amplifiers, operational amplifiers, precision references, bias circuits, comparators, timing circuits, data converters, clock generation circuits, power management circuits, and other custom analog subsystems.
• Develop behavioral models (e.g., Verilog-A), simulation environments, and test benches to support mixed-signal verification, and perform circuit- and system-level simulations to validate design performance.
• Perform transistor-level circuit design, simulation, optimization, and post-layout verification using industry-standard EDA tools.
• Develop custom IC layouts and perform physical verification, including DRC, LVS, and post-layout extraction.
• Collaborate closely with digital ASIC designers, system engineers, physicists, sensor developers, packaging engineers, and firmware developers to implement complete mixed-signal ASIC solutions.
• Develop ASIC test plans and work closely with the test engineering team to characterize fabricated devices, analyze laboratory measurements, debug silicon, and correlate measured performance with simulation results.
• Mentor junior engineers and provide technical leadership on ASIC development projects.
• Prepare technical documentation and contribute to proposals, publications, technical reports, patents, and presentations at internal meetings and scientific conferences.
• Evaluate and adopt emerging semiconductor technologies, circuit architectures, and design methodologies to support future ASIC developments.
• Perform other duties as assigned.
• Perform all work in accordance with laboratory environmental, health, and safety policies and procedures.

Essential Skills and Attributes for Success:

• PhD or MS in Electrical Engineering or Physics with background in solid state circuits and integrated circuit design. 2+ years (Ph.D.) or 5+ years (M.S.) of professional experience in analog integrated circuit design, including demonstrated involvement in one or more successful ASIC developments from design through tapeout and silicon validation.

Applicable Knowledge, Skills and Abilities Required:

Technical Knowledge:

• Strong knowledge of analog CMOS integrated circuit design principles.
• Working knowledge of mixed-signal ASIC design and integration.
• Understanding of semiconductor device physics and analog circuit behavior.
• Knowledge of the complete ASIC development flow from specification through silicon characterization.

Technical Skills

• Demonstrated experience designing transistor-level analog integrated circuits in CMOS technologies.
• Experience designing several of the following: low-noise and operational amplifiers, comparators, references and bias generation circuits, high-performance data converters (ADCs, DACs, TDCs), timing and clock generation circuits, RF integrated circuits and analog front-ends.
• Experience developing behavioral models (e.g., Verilog-A), simulation environments, and performing analog and mixed-signal simulations.
• Experience with IC layout, physical verification (DRC/LVS), and post-layout extraction.
• Experience with industry-standard IC design tools such as Cadence Virtuoso or similar EDA environment.
• Experience performing DC, AC, transient, noise, corner, Monte Carlo, and stability analyses.
• Experience developing ASIC test plans and supporting laboratory characterization, silicon debug, and performance validation.
• Demonstrated experience contributing to successful ASIC tapeouts.

Professional Skills

• Ability to independently lead complex ASIC design activities while contributing effectively within multidisciplinary engineering teams.
• Strong analytical, troubleshooting, and problem-solving skills.
• Ability to communicate technical concepts clearly through technical discussions, documentation, and presentations.
• Ability to mentor junior engineers and contribute to a collaborative research and development environment.
• Ability to manage multiple technical priorities and work effectively on challenging research projects.

Preferred Qualifications

• Experience with advanced CMOS technologies.
• Experience designing ASICs for cryogenic, radiation-tolerant, or other extreme-environment applications.
• Experience with low-noise, low-power, or precision analog circuit design.
• Experience with sensor readout electronics, precision timing circuits, RF integrated circuits, or scientific instrumentation.
• Record of technical publications, patents, or other demonstrated technical contributions.

Work Arrangement:

Please note that the described work arrangement is subject to change based on business needs and is not guaranteed to be final.

• Onsite: This is an onsite role, and the candidate must be able to work from our Batavia office.

Benefits/Perks:

Fermilab offers a competitive and comprehensive benefits program, including:

• Medical, Dental, Vision and Flexible Spending Accounts
• Paid time off
• Life insurance
• Short and Long-term disability insurance
• Retirement benefits
• Onsite day care

Why Fermilab:

Fermilab is America’s premier laboratory for particle physics and accelerator research, funded by the U.S. Department of Energy. We support discovery science experiments in Illinois and locations around the world, including deep underground mines in South Dakota and Canada, mountaintops in Arizona and Chile, CERN in Europe and the South Pole.

Pre-Employment Screening:

Drug-Free Workplace & Pre-Employment Screening

Fermilab is dedicated to fostering a safe, productive and drug-free environment. An offer of employment is contingent upon the successful completion of a background check and drug screening.

HSPD-12

In accordance with Homeland Security Presidential Directive 12 (HSPD-12) new employees are required to obtain and maintain a HSPD-12 Personal Identity Verification (PIV) Credential. To obtain this credential, new employees must successfully complete and pass a federal background check investigation. This investigation includes a declaration of illegal drug activities, including use, supply, possession, or manufacture. This includes marijuana and cannabis derivatives, which are still considered illegal under federal law, regardless of state laws. Failure to obtain or maintain such government access authorization could result in the withdrawal of a job offer or future termination of employment.

Foreign Government Sponsored Activities

Fermilab employees, and certain guest researchers and contractors, are subject to particular restrictions related to participation in Foreign Government Sponsored or Affiliated Activities, as defined and detailed in United States Department of Energy Order 486.1A. Such individuals will be asked to disclose any participation for review by Fermilab's Office of General Counsel.

REAL-ID Requirement for access to Fermilab Campus

Fermilab requires all members of the public to produce a REAL-ID, or equivalent, to access the Fermilab Campus for interviews or career events. A list of acceptable forms of ID can be found here: https://get-connected.fnal.gov/wp-content/uploads/2021/09/REALID-Documents.pdf. If a candidate is selected for an interview but does not possess any of the equivalent documents, we may schedule a virtual interview.

Equal Opportunity Statement

Fermilab is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, age, national origin, disability, veteran status, genetic information, and other legally protected categories.