Job Description

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Opportunity Overview

We’re looking for a highly experienced Senior Analog Layout Engineer to join our semiconductor design team. In this role, you will lead the physical layout and verification of complex analog and mixed-signal ASICs in advanced FinFET technologies, helping deliver the next generation of Teradyne’s test and automation platforms.

You’ll collaborate closely with circuit designers, physical design engineers, and cross-functional partners to create high-quality, manufacturable layouts that meet demanding performance, reliability, and schedule targets.

Key Responsibilities

• Lead the layout design and integration of complex analog and mixed-signal ASIC blocks using Cadence Virtuoso.
• Develop floorplans, placement, routing, and top-level integration strategies for advanced-node technologies, including FinFET.
• Partner with circuit designers to optimize layout solutions for performance, power, area, and reliability.
• Apply advanced layout techniques to ensure device matching, symmetry, shielding, substrate isolation, and noise control.
• Perform and sign off on DRC, LVS, ERC, and parasitic extraction to support first-pass silicon success.
• Support the layout of high-speed and precision analog circuits, including ADCs, DACs, PLLs, references, and SerDes-adjacent blocks.
• Provide technical leadership through layout reviews, methodology development, and best-practice implementation.
• Collaborate with physical design and circuit teams to support timing closure, power integrity, and signal integrity goals.
• Contribute to tape-out activities, foundry interactions, and post-silicon debug and optimization efforts.
• Document layout flows, checklists, and design guidelines to support consistency across projects.
• Mentor junior layout engineers and contribute to team capability development.

All About You

We seek individuals who share our passion for precision, quality, and continuous improvement. Our commitment to customer success drives us to go the extra mile.

Minimum Requirements

• BS degree in Electronic Engineering, Electrical Engineering or related field
• 10+ years of hands-on experience in:
  • • Analog or mixed-signal IC layout.
    • Advanced FinFET process technologies and deep-submicron analog design.
    • TSMC technology platforms.
    • Cadence Virtuoso.
    • Laying out complex analog blocks such as ADCs, DACs, PLLs, bandgaps, bias circuits, and analog interfaces.
    • High-speed and precision analog layout best practices.
    • Semiconductor manufacturing processes and advanced design rules.
    • Ability to independently drive complex layout activities from concept through tape-out.

The ideal candidate will demonstrate the following behavioral traits:

• Excellent analytical, debugging, and problem-solving skills.
• Strong attention to detail and commitment to layout quality.
• Effective verbal and written communication skills.
• Ability to collaborate across design, verification, and manufacturing teams.

We are only considering candidates local to the position location and are unable to provide relocation for this position.

This position is not eligible for visa sponsorship.

Benefits:

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, life insurance, paid vacation & holidays, tuition assistance programs, and more.

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