Job Description

Our teams’ mission is to explore, develop and help productionize high performance software & hardware technologies for AI at datacenter scale. We achieve this via concurrent design and optimization of many aspects of the system from models and runtime all the way to the AI hardware, optimizing across compute, network and storage. The team invests significantly into model optimization on existing accelerator systems and guiding the future of models and AI HW at Meta. This drives improved performance, new model architectures and reduces cost of ownership for all key AI services at Meta: Generative AI and Recommendations.

This is an exciting space that spans exploration and productization, coupled with close collaborations with industry, academia, Meta’s Infrastructure and Product groups. Collaborating closely with product teams, the team's mode of operation is going from ideation and rapid prototyping, all the way to assisting productization of high leverage ideas, working with many partner teams to bring learnings from prototype into production.

In addition to the real-world impact on billions of users of the Meta products, our team members have won Best Paper Awards at prestigious conferences such as ISCA, ASPLOS, SOSP, and OSDI, with multiple papers selected for IEEE Micro Top Picks. We regularly publish in ICML, NeurIPS, SC, HPCA, NSDI, VLDB, MLSys, and more. Overall, our work largely corresponds to the research communities of systems in general and especially systems for ML (MLSys, SOSP, OSDI, SIGCOMM, NSDI), hardware architecture (ISCA, ASPLOS), ML (NeurIPS, ICML, ICLR) and supercomputing (SC, ICS).

We are seeking a Research Scientist to join our AI and Systems CoDesign Group. You will focus on cutting-edge research and development at the intersection of Generative AI workload analysis, model enablement, and co-designing the architecture for Meta's custom AI accelerators. This role involves exploring the theoretical underpinnings and practical implementation of novel hardware-aware mapping techniques to push the boundaries of AI efficiency and performance on Meta’s own silicon.

Responsibilities
Pioneer hardware-software co-design efforts for Meta's custom AI silicon, focusing on programmability, performance, and power efficiency
* Integrate new silicon and system technologies into Meta’s custom AI accelerator roadmap based on workload analysis and future model/GenAI requirements
* Build system performance models and simulators to analyze options for Meta's custom datacenter infrastructure
* Co-optimize deep learning kernels and primitives with hardware architects and internal compiler teams for maximum efficiency on Meta's hardware platform
* Influence the hardware roadmap of Meta’s custom AI accelerators
* Architect and implement advanced frameworks and tooling to facilitate comprehensive comparative analyses across diverse system architectures
* Lead cross-functional initiatives spanning multiple engineering organizations to drive high-impact technical milestones
* Publish research results in recognized conferences (e.g., NeurIPS, ICML, ICLR, ASPLOS, ISCA, HPCA, MLSys, Micro)

Qualifications
Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
* PhD in Computer Science, Electrical Engineering, Applied Mathematics, or a related technical field, or a Master's degree with 3+ years of relevant industry experience
* Proven research experience in one or more of the following areas: hardware-aware model enablement, performance modeling of AI systems or prevailing accelerators/silicon architectures
* Hands-on proficiency with end-to-end AI hardware architecture or on-device mapping algorithm development, encompassing logic, architecture, and optimizations for performance, power, and area (PPA)
* Theoretical background and practical experience with AI models (e.g., CNNs, Transformers, LLMs, Diffusion Models)
* Experience in system-level performance analysis, profiling, and benchmarking of AI workloads
* In-depth experience of Python and experience with at least one major AI framework
* Track record of publishing research in peer-reviewed venues, with experience communicating technical results to both technical and non-technical stakeholders Experience with deploying AI agents and prevalent techniques for increased efficiency
* Experience in co-designing hardware/software interfaces or influencing the architecture of custom silicon
* A significant portfolio of publications in relevant conferences or high-impact journals
* Experience working with state-of-the-art performance modeling infrastructure, as well as contributing to AI model performance projections
* Familiarity with low-level programming for specialized hardware (e.g., CUDA, HIP, Triton) or hardware description languages (HDL)