Job Description

Locations: Hsinchu, Taiwan

Categories: Engineering

Req ID: 80687

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

The Member Technical Staff (MTS), Process Technology Integration will interface with our foundry partner’s process integration teams in order to drive yield, performance and reliability for our high-volume CPU/GPU/APU manufacturing at the latest foundry nodes. You will need to drive deeper engagement with the foundry to better understand their process, make the right decisions jointly in terms of evaluating and implementing process improvements, as well as provide the necessary technical inputs to other AMD teams across physical design, foundry operations, yield, product engineering, quality and reliability teams. This role will require you to interact closely with the foundry (across multiple fabs/nodes) and various global AMD teams.

THE PERSON:

You should have a passion for process technology and the desire to work at the cutting edge to make great products. You will need to “think like a process integrator/ fab technologist” and influence the foundry and AMD global teams to make the right technology decisions for manufacturing AMD products.

KEY RESPONSIBILITIES:

• Provide expertise in process and integration for advanced FEOL Front-End-Of-Line loops such as isolation/fin/channel, epi/source-drain, spacer, gate stack and patterning.
• Detailed review of systematic defect and parametric signatures with the foundry, and oversight of FEOL issues across products and technology nodes.
• Jointly design and analyze process improvement (CIP/BKM) evaluations run at the foundry for FEOL integration loop modules. Provide technical assessment for AMD process change review board for CIP/BKM roll-out decisions.
• Hands-on basic product yield analysis (hardbin, softbin & parametric data) as well as foundry WAT/ electrical test parameter analysis.
• Regular cross-product comparison and analysis of yield loss signatures, including the ability to understand effect of differing DFM/layout usage on fail rates across stdcell types/logic blocks/memory arrays. Able to provide process perspective for DFM/layout tweaks.
• Close collaboration with device analysis teams to understand structural and parametric fail mechanisms for yield loss, potential reliability and quality issues, and deduce process failure mechanisms.
• Interface with supplier quality & reliability engineering teams to provide technical inputs for potential process excursions/material review board, as well as to assess the root cause of reliability/HTOL fails and drive the right corrective actions in the process flow with the foundry.
• Maintaining the FEOL "technology encyclopedia" from test-chip to volume ramp phase for all current technology nodes, including failure analysis/defect pareto/process change history and speculative process flows.
• Keeping abreast of forward-looking industry trends in the area of wafer fab process integration, unit processes, materials and fabrication equipment, as well as competitive analysis/teardowns.
• Learn about and support MEOL process integration loops (replacement metal gate, Vt tuning, silicide & contact) to back up other integration team members when required.

PREFERRED EXPERIENCE:

• Professional experience in the semiconductor industry across multiple technology nodes/generations
• Experience with advanced semiconductor technologies on FinFET technology nodes such as 16/14/12/10/7/5/3nm
• Hands on experience in unit process modules and/or process integration, with emphasis on FEOL related processes such as diffusion/ALD/epi/implant/cleans/litho/FEOL etch/RIE and FEOL integration loop such as multi-patterning/SADP, isolation/fin, epi/source-drain, spacer, gate stack and patterning.
• Knowledge of PFA and FI techniques used in Device Analysis, including the ability to deduce fail mechanisms
• Strong communication skills so as to be able to interact with and influence a wide range of stakeholders including the (external) foundry and (internal) foundry interface, yield, product engineering, device analysis, test-chip and DFM and SoC design teams, in a globally distributed environment across time zones

ACADEMIC CREDENTIALS:

• Master’s or Ph.D. degree preferred in a technical field such as Electrical Engineering, Chemical Engineering, Materials Science and Engineering or Physics/Chemistry
• #LI-SC1
• #LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.