Job Description

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 8 years of experience in C/C++ programming for architectural modeling and performance simulation of SoC subsystems.

Preferred qualifications:

• Experience with software-based system modeling and performance analysis.
• Experience with performance evaluation for mobile or IoT devices.
• Experience in memory management or compression algorithms on Linux.
• Experience in network protocol stacks, packet processing pipelines, or Wi-Fi and modem subsystem architectures.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Develop and port Transaction-Level Modeling (TLM)/functional models for SoC subsystems, focus on network (Wi-Fi/modem) and memory accelerators (data compression).
• Apply knowledge of embedded CPUs, networking protocols, and operating system memory management (zram/zswap) to model pipelines and data flows.
• Implement and verify models using SystemC, Quick Emulator (QEMU), or gem5, ensuring correctness in packet processing and compression transactions.
• Simulate accelerator interactions with host CPUs and memory via Advanced eXtensible Interface (AXI)/Advanced Peripheral Bus (APB) protocols.
• Debug system models and leverage driver development experience for early hardware/software co-verification and software stack execution.