Job Description

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  
• 4 years of experience working with power chip or system power management features definition, design, implementation, integration, and testing.
• Experience with low power design techniques voltage/frequency scaling, xPU and system power states, power modeling, and related software/hardware.

Preferred qualifications:

• Master's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
  
• 1 year of experience in technical leadership role.
  
• Experience in power system design, voltage regulation, energy storage, and conversion topologies.
  
• Knowledge of power electronics fundamentals and various power conversion technologies for data center power delivery.
• Knowledge of power converter modeling and simulation.
• Knowledge on total cost of ownership modeling and simulation.

About the job

Our computational issues mean we can't just purchase off-the-shelf hardware; we've got to make it ourselves. Our platforms team designs and builds the hardware, software, and networking technologies that power all of Google's services. In this role, you will design and build the systems that are the heart of the computing infrastructure. You will develop from the lowest levels of circuit design to system design and see those systems all the way through to manufacturing. Your work has the potential to shape the machinery that goes into our data centers affecting millions of Google users. As a member of the team, you manage projects in multiple areas. You will also monitor the performance of vendors working on projects and evaluate new technologies.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $159,000-$231,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google

Responsibilities

• Innovate and deliver initiatives for server and machine learning system power management and optimization across silicon, platform hardware, rack power, system software, and manufacturing. Design and implement power management specifications and solutions for these systems.
• Develop methodologies for system power modeling and validation of power management features. Analyze trade-offs in performance, cost, reliability, and availability.
• Partner with power industry leaders to guide the evaluation and adoption of technologies.
• Guide cross-functional team collaboration with system architects, hardware engineers, chip designers, software/firmware teams, system qualification, and others. Deliver business justification studies.
• Provide technical guidance and direction while troubleshooting system-level power management issues.