Job Description

Summary

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

As part of the Hardware Technology CAD team, you’ll help design our next-generation, high-performance, power-efficient SoCs. You will work on world class CPU, GPU, Analog/Mixed Signal and SOC designs by developing flows, tools and methodologies for future Apple products! You will explore and enable new technology nodes, stdcells and tools for design teams. You will collaborate with design teams and tool vendors to improve PPA (Power, Performance, Area) and design productivity. You will use and leverage GenAI tools to develop GenAI applications to improve Design team productivity. You will actively work on developing internal methodologies using your understanding of CAD algorithms and ML. We are looking for passionate engineers to join our team. In this role, you will be impacting a wide range of chips used across Apple’s world-class products!

Description

• Participating and engaging with cross functional teams to tackle key physical design challenges.
• Developing innovative solutions in physical design and optimization space.
• Developing and supporting implementation flows for multiple projects and design teams.
• Developing and maintaining custom CAD tools for implementation and signoff.
• Creating flows to enable successful deployment of new technology nodes.
• Developing tools and methodologies for best-in-class PPA and productivity including ML based solutions.
• Use and leverage GenAI tools to develop GenAI applications to improve Design team productivity.
• Collaborating with other teams such as physical design verification, RC extraction, IR and static timing analysis (STA).
• Working directly with EDA tool vendors to resolve tool issues and identify areas for tool improvements.

Preferred Qualifications

Good understanding of VLSI / Physical Design basics through previous coursework or internships

Exposure to CAD Tool, CAD flow or PD methodology.

Understanding of some of the analysis involved in Physical Design - extraction, timing, noise, physical verification, EMIR.

Minimum Qualifications

Knowledge of Tcl, Python or Perl scripting languages

Minimum requirement of BS