
Control-plane software — from Layer 3 (L3) traffic control in mobile networks to microservice-based control planes in telecom and cloud — behaves very differently from the compute-heavy workloads common in CPU benchmarking (e.g., SPEC CPU, HPC, ML training). These workloads are typically front-end and memory-system bound rather than compute bound: low IPC, high branch mispredictions, large instruction footprints causing L1-I/iTLB misses, and pointer-chasing that stalls the back end. CPU microarchitecture is often tuned using representative benchmarks, but this workload class is underrepresented in open suites because real control-plane applications are large, proprietary, and hard to deploy. The result is a genuine gap: there is no open benchmark that faithfully reproduces the microarchitectural behavior of large control-plane software.
The goal is to characterize the microarchitectural behavior of a large control-plane application and build an open-source, configurable benchmark proxy that reproduces it — providing a shareable, non-proprietary tool for CPU architecture exploration. The work will include:
Why join Ericsson?
At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next.
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Primary country and city: Sweden (SE) || Linköping
Req ID: 791413

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