Join us to shape the future of electronic trading technology, where your expertise in C++ and hardware acceleration will make a global impact. You’ll collaborate with talented engineers to deliver market-leading solutions that power high-speed trading across global markets. We value creativity, technical excellence, and a passion for continuous improvement. At JPMorganChase, you’ll find opportunities for career growth, skill development, and meaningful contributions. Be part of a team that thrives on solving complex challenges and advancing industry standards.
As an Ultra Low Latency C++ Lead Software Engineer at JPMorgan Chase in the Electronic Trading Technology team, you will design, build, and operate market gateway solutions with hardware FPGA acceleration. You will drive the software development lifecycle, focusing on stability, latency optimization, and continuous improvement. You’ll partner with hardware engineering teams to integrate FPGA pipelines with our C++ software stack, ensuring high reliability and operational excellence. Your work will directly impact trading connectivity and risk management applications used by clients and internal businesses. You’ll help foster a collaborative, innovative team culture.
Job Responsibilities:
Required Qualifications, Capabilities, and Skills:
Preferred Qualifications, Capabilities, and Skills:
J.P. Morgan is a global leader in financial services, providing strategic advice and products to the world’s most prominent corporations, governments, wealthy individuals and institutional investors. Our first-class business in a first-class way approach to serving clients drives everything we do. We strive to build trusted, long-term partnerships to help our clients achieve their business objectives.
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