Candidate is required to work with foundry companies and their mutual customers by providing foundry enablement solution.
Playing as Chip-level physical implementation experts in foundry reference flow validation and in-design flow correlation and its validation.
Playing as Routing enablement (P&R techfile) experts and its validation
Candidate should have overall design flow understanding Sign-off. Physical implementation- and P&R techfile-related issues between customers and corporate R&D are the major responsibility.
Providing Cadence physical implementation tool solution in timely manner as a Product Engineer and working closely with customer on site and off site.
Interfacing with headquarter R&D and other Product Engineer at difference sites to resolve any technical issues
Around 7+ year professional experience (Master's degree) or 10+ year (Bachelor's degree)
Mostly worked on the physical implementation (P&R) domain and P&R techfile creation & validation
In-depth usage experience on dominant P&R tool (Innovus or ICC)
Good hands-on physical implementation area on advanced technology nodes beyond 28nm
Good communication skills internally with team members and externally with customers
Speaking/writing proficiency in English
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
