Job Description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent real time in layout tools, not just opening Virtuoso but actually building memory cells, bitcells, and arrays that have to meet density, performance, and reliability targets in nodes where a few nanometers matter. You understand that SRAM layout is not just drawing rectangles, it is about symmetry, matching, minimizing parasitic capacitance, and making sure the circuit your designer spent weeks optimizing does not fall apart because of a poorly routed metal layer.

You know the difference between a layout that passes DRC and one that actually works in silicon. When you see an LVS error, you do not panic, you trace it back to the source, whether it is a misaligned contact or a subtlety in the schematic that needs a conversation with the circuit team. At Synopsys, you will work on memory IP that ships in real products, and the layout decisions you make will directly affect performance, yield, and time to market.

What You'll Be Doing

• Design and implement full-custom layout for SRAM memory macros in advanced technology nodes, from bitcell to array to peripheral circuits
• Optimize layouts for area, performance, and power while maintaining design rule compliance and manufacturability
• Run and resolve DRC, LVS, ERC, Antenna, Density, and EM checks using Calibre, ICV, and other verification tools
• Collaborate directly with circuit designers to translate schematics into physical layouts that meet electrical and reliability specifications
• Work with process and foundry teams to interpret and apply technology files, design rules, and device models
• Iterate on layout based on parasitic extraction results and post-layout simulation feedback

The Impact You Will Have

• Your layouts will directly determine the area efficiency, speed, and power consumption of SRAM macros used across Synopsys IP portfolios
• Optimized layout work you deliver will enable faster time to market for customers designing chips in leading-edge nodes
• Clean DRC/LVS closure you achieve will reduce tapeout delays and prevent costly respins
• Collaboration with circuit teams will improve design quality and catch issues before they reach silicon
• Your expertise in advanced nodes will help Synopsys maintain leadership in memory IP competitiveness

What You'll Need

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or Microelectronics
• 1+ years of hands-on experience in SRAM or custom memory layout design
• Strong expertise in SRAM architecture, memory circuits, custom layout techniques, matching, symmetry, and device reliability
• Proficiency with Cadence Virtuoso, Calibre, Custom Compiler, and ICV
• Solid understanding of DRC/LVS closure, RC extraction, and EM/IR considerations
• Experience with advanced technology nodes (7nm, 5nm, or below is a plus)

Who You Are

• You can look at a schematic and immediately start thinking about floorplan, device placement, and routing strategy
• When a DRC rule changes mid-project, you adapt quickly and figure out what needs to be reworked without losing momentum
• You ask circuit designers the right questions about sensitivity, matching requirements, and performance targets before you start layout
• You catch EM violations early because you have learned to think about current density while routing power, not after the fact
• You are comfortable working across time zones with global teams when needed

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.