SiPearl

[INTERNSHIP] Study, integration and deployment of a power estimation tool on hardware emulator

SiPearl  •  Grenoble, FR (Onsite)  •  41 minutes ago
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Job Description

❓ About SiPearl…

SiPearl is the European fabless designer of sovereign secure high-performance energy-efficient CPUs for HPC, AI and data centres. These CPUs will help address strategic challenges in the fields of security, defence, medical research, energy, climate and engineering with a reduced environmental footprint.

In June 25, SiPearl completed the design of the most complex CPU ever designed in Europe, Rhea1. Featuring 80 Arm Neoverse V1 cores, with 61 billion transistors, it is currently in production at TSMC. Sipearl CPUs will equip the two first European exascale supercomputers belonging to EuroHPC JU: Rhea1 will be integrated into the JUPITER machine based in Germany and Rhea2 will be part of Alice Recoque in France.

Incubated within the European Processor Initiative (EPI) consortium and seed-funded by the European Union, SiPearl employs almost 200 people in :

  • France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis),
  • Spain (Barcelona)
  • and Italy (Bologna)

🎯Your missions during this internship

During this internship, you will study a suit of Siemens tools which provide power and activity estimations, integrate the tools into SiPearl’s emulation flow/test benches and deploy the different solutions to users. Finally, you will analyze and correlate the results with some example RTL based simulations, identify power bugs and suggest optimizations for SiPearl’s products.

Working closely with the CAD, design, verification and backend teams, you will bring highly valuable insights into our flagships SoCs and their power behaviors.

Depending on project progress, you may also contribute to low power and power intent validation (integrating UPF concepts/support to our emulation platform).

As an intern, you will be responsible for the following tasks:

  • Study high level and sub-system level architecture and micro-architecture documents on selected projects
  • Study and evaluate relevant software components tools, their requirements and usefulness.
  • Define an execution strategy based on your study (which tools to deploy first, what KPIs to target, what segments of SoC to focus on etc…).
  • Work with CAD and emulation teams to ramp-up on emulation flows and tools at SiPearl.
  • Integrate your selected solution(s) to the flow.
  • Work with verification and SW teams to profile and select representative workloads to be analyzed
  • Analyze early results to guide the rest of the integrationWork with design, architecture and backend teams to review and understand power behaviors
  • Advise and train other team members to use the tools and support their utilization
  • Automate experiments to collect power measurements in automated nightly regressions and reports.

🔍 Learning objectives

  • Deep-dive and learn the inner workings of an extremely complex System On Chip and its sub-systems.
  • Learn the impacts of firmware and software applications on internal chip activity and their correlation to power consumption.
  • Develop expertise in hardware emulation and its uses in SoC design & validation.
  • Develop skills in scripting such as bash, YML, python as well as compute grid allocation (Slurm/LSF)
  • Improve your technical reporting and communication skills through performance studies and recommendations.

➕ Your profile

  • Final-year engineering student or Master's degree student specializing in Computer Science, Computer Engineering, Electronics, or a related field
  • Strong interest in computer architecture, SoC design, emulation/verification/validation
  • Analytical, curious, and methodical, with strong problem-solving skills
  • Comfortable designing experiments, investigating technical challenges, and presenting findings
  • Good written and spoken English, with the ability to work collaboratively in an international environment
  • Practical programming experience in scripting, Verilog/SystemVerilog and C language
  • Basic understanding of SoC architectures and firmware/software execution on modern CPUs
  • Familiarity with transistors and power consumption concepts
  • Good knowledge of Linux environments.

Dear candidate, even if you consider you do not fulfill all the qualifications mentioned above, please still apply and share with us why you believe you would be a good fit.

📍 Location --> Grenoble

At SiPearl, we are dedicated to building a diverse and inclusive workplace that thrives on the strength of varied perspectives and backgrounds. We recruit talent based on merit, experience, and alignment with our company's goals and values.

SiPearl

About SiPearl

SiPearl is the European fabless designer of sovereign high-performance energy-efficient processors for HPC, AI and data centres. These processors will help address strategic dual-use challenges in the fields of security, defence, medical research, energy, climate and engineering with a reduced environmental footprint.

In June 2025, SiPearl completed the design of the most complex processor ever designed in Europe, Rhea1. Featuring 80 Arm Neoverse V1 cores, with 61 billion transistors, it is currently in production at TSMC in Taïwan and will be available for sampling in early 2026. Rhea1 processors will equip JUPITER, the first European exascale supercomputer owned by the EuroHPC JU and operated by the Jülich Supercomputing Centre in Germany.

Incubated within the European Processor Initiative (EPI) consortium and seed-funded by the European Union, SiPearl employs 200 people in France, Spain and Italy. Following a successful €130 million Series A, the company is launching its Series B round.

Industry
Hardware & Semiconductors
Company Size
51-200 employees
Headquarters
Maisons-Laffitte, FR
Year Founded
2019
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