SiPearl is the European fabless designer of sovereign secure high-performance energy-efficient CPUs for HPC, AI and data centres. These CPUs will help address strategic challenges in the fields of security, defence, medical research, energy, climate and engineering with a reduced environmental footprint.
In June 25, SiPearl completed the design of the most complex CPU ever designed in Europe, Rhea1. Featuring 80 Arm Neoverse V1 cores, with 61 billion transistors, it is currently in production at TSMC. Sipearl CPUs will equip the two first European exascale supercomputers belonging to EuroHPC JU: Rhea1 will be integrated into the JUPITER machine based in Germany and Rhea2 will be part of Alice Recoque in France.
Incubated within the European Processor Initiative (EPI) consortium and seed-funded by the European Union, SiPearl employs almost 200 people in :
France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis),
Spain (Barcelona)
and Italy (Bologna)
Following a €130 million Series A, the company has launched its Series B round.
SiPearl is developing the processor dedicated to European supercomputers. In this context, you will join the verification team to ensure the functional correctness and robustness of processor IPs through advanced verification methodologies. Working closely with design engineers, you will contribute to the development and execution of verification environments based on industry standards.
In this internship you will:
Develop communication functions in embedded C (bare-metal, without an operating system) for the verification team, enabling communication between verification processes running on different cores :
Plan the development phases of the communication module
Design and document the communication mechanisms
Implement the communication functions in C
Test and validate the communication between verification processes
Student in the final year of an engineering school or pursuing a Master's degree in electronics, computer engineering, or a related field
Knowledge of embedded C programming
Understanding of on-chip / inter-process communication mechanisms
Comfortable working in a Linux environment (user level)
Familiarity with Git for version control
Good written and spoken English for technical communication
📍 Location -> Castelldefels
SiPearl is the European fabless designer of sovereign high-performance energy-efficient processors for HPC, AI and data centres. These processors will help address strategic dual-use challenges in the fields of security, defence, medical research, energy, climate and engineering with a reduced environmental footprint.
In June 2025, SiPearl completed the design of the most complex processor ever designed in Europe, Rhea1. Featuring 80 Arm Neoverse V1 cores, with 61 billion transistors, it is currently in production at TSMC in Taïwan and will be available for sampling in early 2026. Rhea1 processors will equip JUPITER, the first European exascale supercomputer owned by the EuroHPC JU and operated by the Jülich Supercomputing Centre in Germany.
Incubated within the European Processor Initiative (EPI) consortium and seed-funded by the European Union, SiPearl employs 200 people in France, Spain and Italy. Following a successful €130 million Series A, the company is launching its Series B round.
