Job Description

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
• 10 years of experience in CMOS image sensor architecture, imaging algorithms, ISP implementation, and algorithm specification ownership.
• Experience managing technical initiatives across hardware, firmware, and system software boundaries.
• Experience in C++, Python, and MATLAB for algorithm development, system-level modeling, and automated testing.

Preferred qualifications

• Master’s degree or PhD in Electrical Engineering or Computer Engineering.
• Knowledge of vision Hardware/Software interfaces and experience working with various software driver teams.
• Familiarity with deploying Neural Networks for imaging tasks.
• Proven ability to scale and optimize high-performance AI accelerators.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an Imaging and Vision Algorithm Engineer in Google’s Silicon team, you will be at the heart of defining the hardware and software algorithms that power the next generation of Google’s products. You will lead the definition of a groundbreaking, first-generation product family, bridging the gap between system requirements, AI research, and physical implementation. You will participate in the entire lifecycle of this new product, contributing to its concept, architecture, documentation, implementation, and validation.

In this role, you will work to shape the future of an Edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.

You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Partner with Google Research to transform advanced computational imaging algorithms into high-efficiency hardware logic.
• Create and maintain comprehensive algorithm specifications.
• Design, model, and evaluate next-generation ISP and vision algorithms, pushing performance and image processing capabilities beyond baseline standards.
• Specify and optimize pipeline blocks. Own the testing, tuning, and confirmation of end-to-end Image Quality (IQ) across all operating conditions and product environments.
• Define 3A and post-processing pipelines for the goal use cases.