Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
  
• 2 years of experience programming in C/C++, Python.
• Experience in image and signal processing.

Preferred qualifications:

• Master's degree in Computer Science or Electrical Engineering.
  
• 5 years of experience in image and signal processing on chip products.
  
• Experience in SoC development environment.
  
• Experience in reference model development.
  
• Knowledge of image, video, and computer vision processing algorithms.
  
• Proficiency in C, C++, or Python programming.
  

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will help develop C-model architecture for Image Signal Processor (ISP). You'll create and maintain a software environment for reference ISP C-models, and develop a system model that expands the team to work across organizations for ISP integration.
You will work with ISP architects, implementation designers, verification engineers, and software engineers, providing bit-accurate system c-models and specifications.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Create and maintain software architecture for next generation ISP system.
  
• Implement, model, analyze, and test ISP algorithm pipeline.
  
• Develop a software environment for ISP system development and simulation.
  
• Support delivery of ISP C-models for implementation, verification, and SoC system.
  
• Integrate the ISP C-models into a tuning and pre-silicon software environment.