Responsibilities may involve supporting memory PHY development across various technical domains such as package layout, electrical modelling, signal and power integrity simulation.
Basic understanding of IC design, package/platform architectures, signal and/or power integrity knowledge.
Exposure to package, board layout or 3D modeling tools, and electrical validation is highly value-added.
Good communication skills and team player.
BSEE with relevant or adjacent education syllabus focus.
Intel Contract Employee
Shift 1 (Malaysia)
Malaysia, Penang
Malaysia, Kulim
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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