Job Description
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the
importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture
our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure
Apple products and services can seamlessly and expertly handle the tasks that make them beloved by
millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels
Apple’s devices. Together, you and your team will enable our customers to do all the things they love
with their devices! At Apple, we push our designs to the limit in order to make amazing products. We
want to delight our customers with hardware that performs great while delivering long battery life. As
part of the mobile GPU design team, you will collaborate with Platform Architecture, Software, Design
Verification, and Physical Design teams to deliver RTL and specifications for GPU power management and
SOC interface logic. In addition, you will be responsible for integrating applicable IP from other teams to
enable complete security, debug, and power management solutions!
Deliver high quality design collateral, including RTL, to Physical Design teams
Assess and integrate IP from other Apple teams
Close timing, power, area, and lint for design by optimizing RTL and constraints
Drive performance, power, area, and functional goals
Provide schedules to IP teams and management
Collaborate effectively with IP teams spanning multiple sites
Preferred Qualifications
Ability to write one or more scripting languages
Experience in Graphics hardware design
Experience in power management for large designs like CPUs, GPUs, or SOCs
Minimum Qualifications
BS/MS CE or EE
Experience in one or more of the following areas: logic optimization, synthesis, timing
analysis, floor-planning, power intent descriptions, and clock domain clock crossings
Experience writing RTL in Verilog and/or System Verilog
Experience with logic simulation and debug