Job Description

This is a fully REMOTE role

You will be a key contributor to a safety-critical embedded systems engineering team, responsible for the design, implementation, and verification of preliminary FPGA logic for overspeed protection and ARINC 429 communication systems. Working from defined system requirements and architecture provided by the systems engineering team, you will develop and simulate firmware in a structured, DO-254-aligned development environment using Microchip's Libero toolchain.

Key Responsibilities

• Design and verify preliminary FPGA logic for overspeed protection functions, implementing requirements in firmware based on system engineer-supplied architecture and specifications
• Design and verify preliminary FPGA logic for ARINC 429 communication, leveraging existing design where applicable and extending functionality per updated requirements
• Develop and execute simulation-based verification plans to validate functional correctness of all FPGA logic prior to hardware integration
• Validate all digital inputs and outputs with particular attention to the microprocessor interface on both overspeed and communication FPGAs
• Provide complete pin allocation documentation for both FPGA designs in support of hardware team integration
• Collaborate with systems engineers to interpret preliminary requirements and translate them into implementable firmware logic
• Participate in design reviews, verification reviews, and technical documentation as required by the program schedule
• Support FPGA family and device sizing selection in coordination with the systems and hardware teams

Development Environment

• EDA Tool: Libero SoC (Microchip Technology)
• HDL: VHDL or Verilog
• Simulation: ModelSim (Microsemi edition) integrated within Libero
• FPGA Platform: Microchip (family and device size to be determined)
• Workstation: Provided on-site

Required Qualifications

• 4+ years of experience in FPGA firmware design and verification for embedded or avionics applications
• Proficiency in VHDL or Verilog and RTL design methodology
• Experience with Microchip/Microsemi Libero SoC toolchain, or demonstrated experience with equivalent FPGA EDA tools (Vivado, Quartus) with ability to transition
• Familiarity with ARINC 429 protocol including transmit/receive channel architecture, word structure, and timing requirements
• Understanding of digital I/O interfacing, microprocessor bus interfaces, and pin allocation methodology
• Experience developing and executing simulation-based verification using ModelSim or equivalent
• Ability to work from system-level requirements and architecture documents to implement firmware logic independently

Nice to Have

• Experience with DO-254 design assurance processes for airborne electronic hardware
• Familiarity with overspeed protection logic or other safety-critical FPGA functions in aerospace or defense applications
• Experience with existing ARINC 429 IP cores and integration into custom FPGA designs
• Static timing analysis using SmartTime or equivalent tools
• Background in requirements traceability and configuration management in a regulated development environment
• Knowledge of Microchip PolarFire or SmartFusion2 device families

Salary Range: $135,000-$140,000/K

The actual salary offered is dependent on various factors including, but not limited to, location, the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience