Job Description

Job Summary

Altera is seeking an experienced FPGA Development Tools Validation Technical Lead to drive the validation strategy and execution for our cutting-edge FPGA development tools. This role involves leading a team to ensure the quality, performance, and reliability of our software tools, which are critical for FPGA design, synthesis, and implementation.

Job Responsibilities

• Lead and mentor a team of validation engineers, providing technical guidance and fostering their professional growth.
• Define and implement comprehensive validation strategies, test plans, and methodologies for FPGA development tools, including synthesis, place and route, timing analysis, and simulation.
• Collaborate closely with software development, architecture, and product marketing teams to understand product requirements and ensure test coverage.
• Oversee the design, development, and maintenance of advanced test environments, test benches, and automation frameworks.
• Drive continuous improvement in validation processes, tools, and techniques to enhance efficiency and effectiveness.
• Analyze complex technical issues, debug problems, and provide detailed reports and recommendations to development teams.
• Stay abreast of industry trends and emerging technologies in FPGA design, validation, and software development.
• Present validation status, risks, and progress to stakeholders and management.

Qualifications:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 8+ years of experience in FPGA development, verification, or validation, with a strong focus on software tools.
• 3+ years of experience in a technical leadership or team lead role.
• Deep understanding of FPGA architectures, design flows (RTL to bitstream), and validation methodologies.
• Proven expertise in using FPGA development tools from major vendors (e.g., Altera/Intel, Xilinx/AMD).
• Strong proficiency in scripting languages such as Python, Perl, or Tcl.
• Experience with automation frameworks and continuous integration/continuous delivery (CI/CD) pipelines.
• Excellent problem-solving, debugging, and analytical skills.
• Strong communication, interpersonal, and leadership abilities.
• Familiarity with hardware description languages (Verilog/VHDL) and simulation tools is a plus.

Job Type:

Regular

Shift:

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.