Provide technical support for Virtuoso‑based analog backend flows, including schematic, layout, and design environment usage.
Assist in PDK usage and enablement from a foundry perspective, ensuring correct adoption of process rules and recommended flows in Virtuoso.
Assist foundry teams in the development and maintenance of Virtuoso technology files (techfiles), PCells, and related QA flow.
Work with product engineers and R&D teams to communicate customer issues and feedback, and help track resolution under guidance from senior engineers.
Participate in foundry‑related customer engagements as needed, focusing on tool usage, flow clarification, and issue reproduction.
Bachelor’s degree(EE/CS) with 3+ years of work experience in IC design house or foundry. MS degree is desired
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
