Job Description

Duties & Responsibilities:

Pre-Construction & Bid Strategy

· Analyze 1-line diagrams, PFDs, P&IDs, tool hook-ups, and clean-room layouts to define electrical scope (high/medium/low voltage distribution, UPS, DC power, grounding, bonding, LV controls, and tool install feeds).

· Participate in design-assist sessions with owners, A/E teams, and tool OEMs to drive cost-effective design decisions that protect fab reliability and yield.

· Develop robust work-breakdown structures and cost codes tailored to semiconductor facility CSI MasterFormat and SEMI S2/S8 requirements.

Quantity Take-Off & Pricing

· Perform detailed take-offs (Divisions 26, 27, 28 + process controls cabling) using Accubid, Trimble, or equivalent—integrating linear-foot, count, and lump-sum assemblies for tray, conduit, clean-room modular raceways, and hook-up kits.

· Incorporate regional labor-productivity factors for sub-fab congested areas, overhead clean-room work, and ISO-class protocols.

· Solicit, level, and scope quotes from semiconductor-qualified subcontractors and suppliers (busway, switchgear, VFDs, clean-room lighting, FM-4910 materials).

Cost & Risk Management

· Prepare ROM, Class III, and GMP estimates with defined accuracy ranges; build and maintain historical cost databases specific to fabs (cost per square foot, cost per MW).

· Identify constructability risks—tool move-in sequencing, hook-up window constraints, utility shutdowns—and apply appropriate contingency and escalation.

· Support value-engineering efforts that reduce total installed cost while maintaining SEMI and FM global standards.

Proposal & Client Interface

· Assemble complete bid packages, clarifications, and alternates; present estimate basis to owners, EPCMs, and internal executives.

· Contribute to subcontractor buy-outs and early procurement of long-lead electrical equipment (12 kV switchgear, dry-type transformers, clean-room LEDs).

· Maintain ongoing relationships with semiconductor clients, OEM tool vendors, and industry trade partners.

Continuous Improvement

· Track market trends in copper, aluminum, and semiconductor-grade materials; adjust pricing indexes quarterly.

· Mentor junior estimators on semiconductor-specific safety, cleanliness, and E-stop interlock requirements.

· Champion digital take-off and model-based estimating workflows (Navisworks, Revit, BIM 5D).

QUALIFICATIONS:

· Bachelor’s degree in Electrical Engineering, Construction Management, or related field (or equivalent experience).

· 3–7 years of estimating experience on large-scale industrial or technology projects, with at least 2 years focused on semiconductor facilities.

· Proficiency in Accubid, Esticom, or similar; advanced Excel and scheduling (Primavera P6/MS Project).

· Deep understanding of NEC, IEEE, SEMI S2/S8, and FM-Global standards.

· Strong analytical, written, and verbal communication skills; ability to present cost strategies to executive and client teams.

· Eligibility to work on sensitive semiconductor sites (may require export-control or background clearance).

PHYSICAL REQUIREMENTS:

• Accommodation may be made for some of these physical demands for otherwise qualified individuals who require and request such accommodation. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential function(s).