Job Description

About GlobalFoundries

GlobalFoundries (GF) is a leading full-service semiconductor foundry, delivering a unique blend of design, development, and manufacturing services to some of the world’s most innovative technology companies. With a global manufacturing footprint across three continents, GF enables the technologies and systems that transform industries and empower customers to shape their markets. Learn more at https://www.gf.com.

of Role

Quantum Technology Solution (QTS) is the new business recently launched at GlobalFoundries to enable the Quantum industry to transition from lab-scale to Utility Scale Quantum Computing.

We are seeking a driven Product Manager to lead one of the foundation of our Quantum Technology Solution strategy – Cryogenic CMOS. This role is ideal for an experienced Product Manager with a strong background in quantum technology especially cyro-ASICs. This role will focus on adapting the existing GF CMOS technology platform for cryogenic applications including quantum control and read-out IC ASIC devices. Creating cryo-CMOS ASIC requires cryo-PDK’s, cryo-optimized devices and cryo-qualified IP titles relevant for cryo-ASIC applications. The cryo-CMOS offerings are qubit agnostic – they can interface to any modality required. The Product Manager will play a central role in translating the quantum systems requirements into product requirements that serves as the basis for the development cryogenic CMOS technologies.

The Product Manager for CryoCMOS is responsible for defining and commercializing GF's cryogenic semiconductor platform strategy by translating customer quantum system requirements into scalable product roadmaps, enabling technologies, ecosystem partnerships, and revenue-generating offerings that accelerate the adoption of cryogenic electronics

Essential Responsibilities

• Responsible for the growth and profitability of cryogenic-CMOS platforms for the Quantum Technology Solutions (QTS) business
• Own the product strategy, business case, and multi-year roadmap for GF's CryoCMOS platform portfolio, including Cryo-PDKs, cryogenic device models, foundational IP, cryogenic test enablement, and application-specific platform extensions.
• Define product positioning and value propositions for quantum computing, quantum networking, quantum sensing, aerospace, and other cryogenic markets.
• Establish roadmap priorities based on market requirements, customer demand signals, technology readiness, and business opportunity.
• Drive portfolio decisions across technology nodes, platform extensions, reference designs, and design enablement offerings.
• Serve as the primary business and product interface for strategic CryoCMOS customers.
• Lead deep technical engagement with quantum computing companies, system architects, cryogenic electronics teams, defense agencies, and ecosystem partners.
• Translate customer requirements into prioritized product specifications, performance targets, reliability requirements, PDK capabilities, IP needs, and development milestones.
• Lead regular roadmap reviews with customers to ensure alignment between customer scaling requirements and GF platform evolution
• Build and manage the CryoCMOS opportunity funnel from early engagement through NRE, platform adoption, MPWs, and production deployment.
• Partner with sales, business development, and account teams to identify, qualify, and close strategic opportunities.
• Develop commercialization models including platform access programs, technology membership offerings, NRE engagements, consortium models, and long-term manufacturing relationships
• Support customer contracting, technical Statements of Work, pricing strategy, and business negotiations
• Define product offerings including Cryo-PDKs, cryogenic libraries, memory IP, analog IP, I/O solutions, reference designs, test vehicles, and evaluation platforms.
• Drive execution with Technology Development, Design Enablement, Manufacturing, Reliability, Test, and Packaging teams
• Define the CryoCMOS customer enablement roadmap including: Cryogenic PDK releases, Foundational IP portfolio, Standard cells, Memory IP, Analog and RF building blocks, Design flows, Reference architectures
• Partner with engineering teams to establish the cryogenic test, characterization, qualification, and reliability roadmap.
• Help define investment priorities for cryogenic measurement infrastructure, model generation, and characterization capabilities.
• Interface with the Technology Solutions Architect (TSA) and Technology Development (TD) organizations to ensure the product requires are converted faithfully into the technology specifications and an execution plan is established to deliver cryo-CMOS meeting the customers requirement for performance and schedule.

Other Responsibilities

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

• Master's degree or PhD in Electrical Engineering, Physics, Applied Physics, Computer Engineering, Materials Science, or related technical field.
• 10+ years of semiconductor product management, strategic marketing, technology commercialization, or business leadership experience.
• Demonstrated experience working with advanced semiconductor technologies, CMOS platforms, mixed-signal devices, RF, high-performance computing, quantum systems, or related markets.
• Experience translating customer requirements into product roadmaps and technology development priorities.
• Strong customer-facing experience with executive and technical stakeholders.
• Proven ability to drive cross-functional programs involving product management, R&D, manufacturing, and business development organizations.
• Experience developing business cases, product strategies, pricing models, and commercialization plans.
• Excellent written and verbal communication skills.
• Ability to travel globally (approximately 25-40%).

Preferred Qualifications

• Direct experience with cryogenic electronics, CryoCMOS, quantum computing, quantum networking, quantum sensing, superconducting systems, spin qubits, neutral atoms, ion traps, or photonic quantum systems.
• Experience developing semiconductor PDKs, design enablement solutions, reference flows, or IP portfolios.
• Familiarity with cryogenic characterization, reliability, and test methodologies.
• Experience with advanced packaging technologies including 2.5D integration, 3DHI, hybrid bonding, TSVs, and heterogeneous integration.
• Knowledge of EDA ecosystems, semiconductor IP licensing models, and foundry business models.
• Experience managing customer-funded development programs, NRE engagements, JDA structures, and government-funded technology programs.
• Established network within the quantum technology ecosystem.
• Demonstrated success launching new semiconductor platforms from concept through commercialization.

Expected Salary Range

$166,500.00 - $319,000.00

The exact Salary will be determined based on qualifications, experience and location.