Job Description

Summary

Join our team at Apple developing complex mixed-signal IPs for Apple’s custom integrated circuits. Our team has shipped hundreds of millions of chips into Apple’s existing product lines, and is developing new chips for future product lines!

In this role, you will create high-speed behavioral models for complex analog IPs that interface with digital control logic. Your models will “close the loop” in mixed-signal simulations, catch cross-domain bugs, and deliver 10x to 1000x speedups over transistor-level simulations—driving critical productivity gains across Apple's next-generation silicon roadmap. We are a prolific, diverse team looking for an enthusiastic engineer ready to build industry-leading products that surprise and delight our customers.

Description

• Collaborate with system architects, analog designers, and digital teams to establish precise model specifications for mixed-signal IPs.
• Develop high-speed models from schematics and design specs.
• Build mixed-signal testbenches and integrate models into projects to close the simulation loop.
• Develop verification plans, run regression suites, and debug digital/analog corner cases.
• Correlate model accuracy and performance against transistor-level SPICE simulations.
• Drive modeling methodologies to accelerate simulation turnaround times and ensure tapeout readiness.

Preferred Qualifications

Experience developing digital logic or behavioral models for analog and mixed-signal circuits (e.g., SystemVerilog, Real Number Modeling / RNM, or Verilog-A/AMS).

Solid fundamentals in digital design and RTL development (SystemVerilog/Verilog).

Good knowledge of analog circuits and architectures (e.g., power converters, regulators, references, ADCs/DACs).

Experience with industry-standard simulation and verification tools (e.g., Xcelium, Virtuoso).

Strong debugging and cross-functional communication skills.

Minimum Qualifications

Minimum requirement of a bachelors degree