Job Description
๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐
๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ฏ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ฒ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ฏ๐ฌ-๐ฒ๐ฌ ๐๐ฃ๐)
Experience: 6+ yrs
Location: Bengaluru
Job Type: Full-time
We are seeking an experienced and detail-oriented Design Verification Engineer with strong expertise in DisplayPortprotocol verification and advanced digital design verification methodologies. This role is ideal for professionals with a passion for semiconductor verification, protocol compliance, and building high-quality verification environments for complex SoC and IP designs.
As a Design Verification Engineer, you will be responsible for planning, developing, and executing comprehensive verification strategies for DisplayPort-based IPs and subsystems. You will work closely with design engineers, architects, and cross-functional teams to ensure functional correctness, protocol compliance, and first-pass silicon success. The role offers an opportunity to work on cutting-edge semiconductor technologies while contributing to the development of high-performance display interfaces and next-generation SoC solutions.
Requirements
Key Responsibilities
- Develop and execute comprehensive verification plans for DisplayPort IPs, controllers, and SoC components.
- Design, build, and maintain scalable SystemVerilog/UVM-based verification environments for functional verification.
- Create reusable verification components, testbenches, constrained-random tests, assertions, and functional coverage models.
- Verify DisplayPort protocol compliance across multiple link configurations, video modes, and system scenarios.
- Collaborate closely with RTL designers and architects to understand design specifications and define verification strategies.
- Debug complex functional failures by analyzing simulation waveforms, protocol transactions, and RTL behavior.
- Perform regression testing, coverage analysis, and verification closure to ensure complete design validation.
- Develop protocol checkers, scoreboards, monitors, and reference models to improve verification quality and efficiency.
- Participate in design reviews, verification planning, and technical discussions to identify potential design risks early.
- Optimize verification environments for simulation performance, scalability, and maintainability.
- Work with cross-functional teams to support IP integration, SoC verification, and silicon bring-up activities.
- Maintain technical documentation, verification reports, and test results while contributing to continuous process improvements.
What Makes You a Great Fit
- 6+ years of experience in Design Verification within the semiconductor industry.
- Strong hands-on expertise in DisplayPort protocol verification and digital IP verification.
- Excellent knowledge of SystemVerilog, UVM, assertions (SVA), constrained random verification, and functional coverage.
- Strong understanding of digital design concepts, RTL architecture, and SoC verification methodologies.
- Experience developing reusable verification environments and complex protocol-based testbenches.
- Proficiency with industry-standard simulation and debug tools such as Synopsys VCS, Cadence Xcelium, Siemens QuestaSim, and Verdi.
- Strong debugging and analytical skills with the ability to isolate and resolve complex verification issues.
- Experience with regression automation, coverage closure, and verification metrics.
- Familiarity with additional high-speed interface protocols such as PCIe, USB, HDMI, MIPI, or similar is an added advantage.
- Excellent communication and collaboration skills with the ability to work effectively across design, verification, and architecture teams.
- Self-motivated, quality-focused, and committed to delivering robust verification solutions that enable successful first-pass silicon and high-performance semiconductor products.