Design Engineer II
This is an opportunity to join a dynamic and growing team of experienced engineers developing physical layer IP’s for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who can work independently to complete assigned tasks and collaborate with other members to achieve project milestones. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES - from architecture development to implementation, verification, testing and customer deployment.
Responsibilities
Desired Skills

Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.