Job Description

Company:

Job Area:

Engineering Group, Engineering Group > Hardware Systems Engineering

General Summary:

1. Role Overview

• Responsible for baseband system (BBsys) definition, integration, and validation at platform/device level
• Acts as the bridge between SoC, PCB, RF, power, and mechanical teams
• Owns system-level design trade-offs, ensuring optimal performance, cost, SI/PI, and manufacturability

2. Key Responsibilities

(1) System Architecture & Integration

• Define baseband system architecture including SoC, memory (LPDDR), storage (UFS), PMIC interfaces
• Analyze and optimize system-level KPIs
  • Performance (bandwidth, latency)
  • Power (idle/active/thermal)
  • Cost / BOM
• Drive cross-functional alignment (SoC / RF / PMIC / PCB / OEM)

(2) SI/PI & Design Guidelines Ownership

• Develop and own signal integrity (SI) / power integrity (PI) guidelines
• Drive DOE (Design of Experiments) and simulation-based validation
• Provide PCB design inputs, including:
  • Topology
  • Stack-up
  • Routing constraints
• Review design compliance and ensure guideline convergence across stakeholders

(3) Platform Bring-up & Debug

• Support EVT/DVT/PVT bring-up
• Debug system-level issues:
  • High-speed IO (DDR, UFS, PCIe, USB)
  • Power integrity issues (PDN noise, droop)
  • Signal integrity failures
• Work with lab teams on:
  • Measurement correlation (scope/VNA)
  • Failure root cause analysis

(4) Device First / System Modeling

• Build and maintain system models (pre-/post-silicon)
• Define and track Device First metrics (system-level KPIs)
• Predict performance impact of:
  • New SoC features
  • Package / pinmap changes
  • PCB variations

(5) Cross-team Technical Leadership

• Lead technical reviews (HLDR, PC1/PC2, CoRRAL)
• Provide system-level risk assessment and trade-offs
• Drive guideline release milestones and tracking

3. Required Skills & Experience

Technical Skills

• Strong knowledge of:
  • High-speed interfaces: DDR, PCIe, USB, UFS
  • SI/PI fundamentals (impedance, reflection, crosstalk, PDN)
  • PCB design concepts (stack-up, routing, return path)
• Experience with simulation tools (one or more):
  • ADS / HFSS / SIwave / PowerSI
• Familiar with:
  • SoC architecture
  • Package + board co-design

Soft Skills

• Strong cross-functional communication
• Ability to drive alignment across global teams
• Strong debug and problem-solving capability

4. Qualifications

• B.S./M.S. in:Electrical Engineering / Electronics / Communication Engineering
• ≤ 3years (BB Engineer) relevant experience
• Has expertise Cadence Allegro, Xpedition
• Has the knowledge on mobile phone system and hardwares electric circuit design
• Excellent communication skills (written and oral) in both Chinese and English.

5. Typical Deliverables

• System architecture documents (HLDR, CoRRAL inputs)
• SI/PI design guidelines
• Simulation reports (DOE results)
• Bring-up/debug reports
• KPI tracking dashboards

Minimum Qualifications:

• Bachelor's degree in Engineering or related field.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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