Synopsys Inc

Applications Engineering, Sr Staff Engineer (Static Timing Analysis)

Synopsys Inc  •  Bengaluru, IN (Onsite)  •  3 hours ago
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Job Description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years deep in the timing closure trenches, and you know that the difference between a chip that tapes out on schedule and one that slips six months often comes down to someone who understands both the tool and the real design problem underneath. You have seen PrimeTime from every angle: competitive evals where you had to prove superiority in two days, tape-out firefights at 2 AM, and those strategic conversations where a VP needs to understand why their timing methodology needs to change.

You do not just run the tool. You understand setup and hold violations in the context of process corners, you can debug a crosstalk issue that is hiding in a specific mode, and you know when a timing problem is actually a synthesis problem or an extraction artifact. When a customer's design team is stuck, you can look at their reports, ask three targeted questions, and find the path forward.

You are equally comfortable sitting with an engineer walking through TCL debug and presenting to a director explaining why their current flow is leaving performance on the table. You have learned that the best technical win is the one where the customer feels like they discovered it with you, not that you sold them something. At Synopsys, you will work with the teams building the most advanced chips in the world, and what you help them solve actually matters.

What You'll Be Doing

  • Drive PrimeTime adoption and deployment at customer sites, from initial competitive benchmarks through production tape-out support across advanced node designs
  • Lead technical evaluations that demonstrate PrimeTime's advantages over competing STA tools, translating runtime, capacity, and accuracy metrics into clear business value for design teams and management
  • Provide hands-on support during critical design phases, including timing closure, ECO iterations, and sign-off, working directly with customer engineers to resolve complex timing, SI, and variation issues
  • Develop and deliver technical training on PrimeTime workflows, covering timing constraints, multi-mode multi-corner analysis, variation modeling, and integration with synthesis and physical design flows
  • Collaborate with R&D to communicate customer requirements, reproduce field issues, and influence product roadmap based on real design challenges you see in the field
  • Build and maintain TCL-based automation scripts and methodologies that improve customer productivity and demonstrate best practices for timing analysis workflows
  • Act as the technical bridge between customers, sales, marketing, and engineering, translating customer pain points into actionable product feedback and solution strategies

The Impact You Will Have

  • Enable customers to tape out complex SoCs on schedule by resolving timing bottlenecks that would otherwise cause costly respins or schedule slips
  • Expand PrimeTime footprint at strategic accounts by proving technical superiority in head-to-head evaluations, directly contributing to revenue growth and competitive wins
  • Accelerate customer productivity by delivering training and methodology improvements that reduce timing closure cycles from weeks to days
  • Shape future PrimeTime capabilities by channeling real-world design challenges back to R&D, ensuring the product evolves to meet next-generation design requirements
  • Build deep technical credibility with customer design teams and management, becoming the trusted advisor they turn to when timing issues threaten project milestones
  • Reduce support escalations by developing reusable scripts, documentation, and best practices that empower customers to solve common problems independently
  • Strengthen Synopsys's position as the timing sign-off standard by demonstrating value across the full design flow, from RTL to GDS

What You'll Need

  • Bachelor's degree in Electrical Engineering or equivalent, with 10+ years of hands-on experience in ASIC/SoC design or EDA applications, or Master's degree with 8+ years of experience
  • Deep working knowledge of Synopsys PrimeTime, including hands-on experience with timing analysis, constraint development, and sign-off flows
  • Strong understanding of timing concepts including setup/hold analysis, clock domain crossing, multi-mode multi-corner scenarios, OCV, AOCV, and signal integrity effects
  • Proficiency in TCL scripting for automation, analysis, and methodology development in EDA tool environments
  • Familiarity with the broader digital design flow, including synthesis, place and route, extraction, and ECO methodologies, and how STA fits into each phase
  • Excellent communication skills with the ability to explain complex technical tradeoffs to both engineers and management, prior customer-facing or field engineering experience is a strong plus
  • Willingness to travel to customer sites as needed to support evaluations, training, and critical design milestones

Who You Are

  • You can walk into a customer war room during a timing crisis, look at their reports and setup, and within an hour identify whether the issue is a constraint problem, a tool setting, or a fundamental design issue
  • You know how to run a competitive benchmark that is both technically rigorous and tells a clear story, you measure what matters and you can explain the results to someone who has never opened PrimeTime
  • You are comfortable saying 'I don't know, but I'll find out' and then actually following through, often by pulling in the right R&D engineer or digging into the code yourself
  • You can write TCL that does not just work but that someone else can read and modify six months later, and you have strong opinions about what makes a timing methodology sustainable versus fragile
  • You have been in enough tape-out cycles to know when to push back on an unrealistic constraint and when to help the team find a creative workaround
  • You build relationships that last beyond the eval period, customers call you because they trust your judgment, not just because you know the tool

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Inc

About Synopsys Inc

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services.

We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

Industry
IT & Software
Company Size
10,000+ employees
Headquarters
Sunnyvale, California
Year Founded
Unknown
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