Job Description

NVIDIA is seeking a strong hardware engineer to drive AI adoption for the MSS-Interconnect frontend team. In this role, you will identify where modern AI can create real value for RTL, verification, debug, and design-review workflows, and turn promising capabilities into practical solutions engineers use every day. You will work across global, cross-site RTL, verification, CAD, and methodology teams to improve productivity through trusted, scalable AI workflows.

What you'll be doing:

• Identify high-impact opportunities to apply AI across RTL, verification, debug, code understanding, and design-review workflows.

• Continuously evaluate new AI tools, models, and agent capabilities, and determine which are worth adopting for real engineering work.

• Build and maintain AI-assisted workflows, tools, and reusable components that improve team productivity.

• Partner with hardware engineers to turn real pain points into practical AI use cases and iterate based on usage and feedback.

• Drive adoption beyond early prototypes by improving workflow quality, reliability, and long-term usefulness.

• Help the team make sound decisions on where to experiment, invest, and scale as the AI landscape evolves.

What we need to see:

• BS or MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

• 3+ years of relevant experience in ASIC / SoC frontend engineering, verification, design methodology, or engineering productivity tooling.

• Strong understanding of hardware frontend workflows, including RTL design, verification, debug, and design reviews.

• Strong Python and software engineering skills, with experience building practical automation or tools for engineers.

• Sufficient hardware depth to judge whether an AI-assisted solution is useful, technically sound, and deployable.

• Strong problem-solving, communication, and cross-team collaboration skills.

Ways to stand out from the crowd:

• Experience building or deploying LLM-based tools, agents, or AI-assisted workflows for engineering users.

• Strong hands-on familiarity with modern AI tooling and good judgment on which new tools are worth trialing or adopting.

• Experience driving sustained adoption of internal tools, not just prototypes or isolated evaluations.

• Familiarity with frontend hardware development environments and debug-intensive workflows.

• Background with Interconnect, NoC, Memory System, bus-fabric, or related silicon domains.